[v4,1/3] common/cnxk: dma result to an offset of the event
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Commit Message
Adds support to configure writing result to offset of the DMA
response event.
Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
---
v4:
- Fixed compilation error.
- Updated release notes.
v3:
- Rebased and fixed compilation error.
v2:
- Added dual workslot enqueue support.
- Fixed compilation error.
drivers/common/cnxk/roc_dpi.c | 6 +++++-
drivers/common/cnxk/roc_dpi.h | 2 +-
drivers/common/cnxk/roc_dpi_priv.h | 4 ++++
drivers/common/cnxk/roc_idev.c | 20 ++++++++++++++++++++
drivers/common/cnxk/roc_idev_priv.h | 3 +++
drivers/dma/cnxk/cnxk_dmadev.c | 2 +-
6 files changed, 34 insertions(+), 3 deletions(-)
@@ -83,6 +83,9 @@ roc_dpi_configure(struct roc_dpi *roc_dpi, uint32_t chunk_sz, uint64_t aura, uin
mbox_msg.s.aura = aura;
mbox_msg.s.sso_pf_func = idev_sso_pffunc_get();
mbox_msg.s.npa_pf_func = idev_npa_pffunc_get();
+ mbox_msg.s.wqecsoff = idev_dma_cs_offset_get();
+ if (mbox_msg.s.wqecsoff)
+ mbox_msg.s.wqecs = 1;
rc = send_msg_to_pf(&pci_dev->addr, (const char *)&mbox_msg,
sizeof(dpi_mbox_msg_t));
@@ -94,7 +97,7 @@ roc_dpi_configure(struct roc_dpi *roc_dpi, uint32_t chunk_sz, uint64_t aura, uin
}
int
-roc_dpi_dev_init(struct roc_dpi *roc_dpi)
+roc_dpi_dev_init(struct roc_dpi *roc_dpi, uint8_t offset)
{
struct plt_pci_device *pci_dev = roc_dpi->pci_dev;
uint16_t vfid;
@@ -103,6 +106,7 @@ roc_dpi_dev_init(struct roc_dpi *roc_dpi)
vfid = ((pci_dev->addr.devid & 0x1F) << 3) | (pci_dev->addr.function & 0x7);
vfid -= 1;
roc_dpi->vfid = vfid;
+ idev_dma_cs_offset_set(offset);
return 0;
}
@@ -11,7 +11,7 @@ struct roc_dpi {
uint16_t vfid;
} __plt_cache_aligned;
-int __roc_api roc_dpi_dev_init(struct roc_dpi *roc_dpi);
+int __roc_api roc_dpi_dev_init(struct roc_dpi *roc_dpi, uint8_t offset);
int __roc_api roc_dpi_dev_fini(struct roc_dpi *roc_dpi);
int __roc_api roc_dpi_configure(struct roc_dpi *dpi, uint32_t chunk_sz, uint64_t aura,
@@ -31,6 +31,10 @@ typedef union dpi_mbox_msg_t {
uint64_t sso_pf_func : 16;
/* NPA PF function */
uint64_t npa_pf_func : 16;
+ /* WQE queue DMA completion status enable */
+ uint64_t wqecs : 1;
+ /* WQE queue DMA completion status offset */
+ uint64_t wqecsoff : 8;
} s;
} dpi_mbox_msg_t;
@@ -301,6 +301,26 @@ idev_sso_set(struct roc_sso *sso)
__atomic_store_n(&idev->sso, sso, __ATOMIC_RELEASE);
}
+void
+idev_dma_cs_offset_set(uint8_t offset)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+
+ if (idev != NULL)
+ idev->dma_cs_offset = offset;
+}
+
+uint8_t
+idev_dma_cs_offset_get(void)
+{
+ struct idev_cfg *idev = idev_get_cfg();
+
+ if (idev != NULL)
+ return idev->dma_cs_offset;
+
+ return 0;
+}
+
uint64_t
roc_idev_nix_inl_meta_aura_get(void)
{
@@ -43,6 +43,7 @@ struct idev_cfg {
struct idev_nix_inl_rx_inj_cfg inl_rx_inj_cfg;
plt_spinlock_t nix_inl_dev_lock;
plt_spinlock_t npa_dev_lock;
+ uint8_t dma_cs_offset;
};
/* Generic */
@@ -61,6 +62,8 @@ void idev_sso_pffunc_set(uint16_t sso_pf_func);
uint16_t idev_sso_pffunc_get(void);
struct roc_sso *idev_sso_get(void);
void idev_sso_set(struct roc_sso *sso);
+void idev_dma_cs_offset_set(uint8_t offset);
+uint8_t idev_dma_cs_offset_get(void);
/* idev lmt */
uint16_t idev_lmt_pffunc_get(void);
@@ -592,7 +592,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused, struct rte_pci_de
rdpi = &dpivf->rdpi;
rdpi->pci_dev = pci_dev;
- rc = roc_dpi_dev_init(rdpi);
+ rc = roc_dpi_dev_init(rdpi, 0);
if (rc < 0)
goto err_out_free;