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[204.195.123.141]) by smtp.gmail.com with ESMTPSA id l22-20020a17090b079600b0029a8e5355fcsm1965578pjz.53.2024.02.29.15.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Feb 2024 15:00:27 -0800 (PST) From: Stephen Hemminger To: dev@dpdk.org Cc: Stephen Hemminger , Nicolas Chautru Subject: [PATCH 33/71] baseband/acc: replace use of fixed size rte_memcpy Date: Thu, 29 Feb 2024 14:58:20 -0800 Message-ID: <20240229225936.483472-34-stephen@networkplumber.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240229225936.483472-1-stephen@networkplumber.org> References: <20240229225936.483472-1-stephen@networkplumber.org> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Automatically generated by devtools/cocci/rte_memcpy.cocci Signed-off-by: Stephen Hemminger --- drivers/baseband/acc/rte_acc100_pmd.c | 19 +++++++++---------- drivers/baseband/acc/rte_vrb_pmd.c | 21 ++++++++++----------- 2 files changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index 292537e24dc9..8bc0ce9d5532 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -3102,15 +3102,13 @@ enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op, uint8_t *prev_ptr = (uint8_t *) prev_desc; uint8_t *new_ptr = (uint8_t *) desc; /* Copy first 4 words and BDESCs */ - rte_memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); - rte_memcpy(new_ptr + ACC_5GUL_OFFSET_0, - prev_ptr + ACC_5GUL_OFFSET_0, - ACC_5GUL_SIZE_1); + memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); + memcpy(new_ptr + ACC_5GUL_OFFSET_0, + prev_ptr + ACC_5GUL_OFFSET_0, ACC_5GUL_SIZE_1); desc->req.op_addr = prev_desc->req.op_addr; /* Copy FCW */ - rte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET, - prev_ptr + ACC_DESC_FCW_OFFSET, - ACC_FCW_LD_BLEN); + memcpy(new_ptr + ACC_DESC_FCW_OFFSET, + prev_ptr + ACC_DESC_FCW_OFFSET, ACC_FCW_LD_BLEN); acc100_dma_desc_ld_update(op, &desc->req, input, h_output, &in_offset, &h_out_offset, &h_out_length, harq_layout); @@ -3257,7 +3255,8 @@ enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op, desc = acc_desc(q, total_enqueued_cbs); desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset; desc->req.data_ptrs[0].blen = ACC_FCW_LD_BLEN; - rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, ACC_FCW_LD_BLEN); + memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, + ACC_FCW_LD_BLEN); ret = acc100_dma_desc_ld_fill(op, &desc->req, &input, h_output, &in_offset, &h_out_offset, &h_out_length, @@ -4560,7 +4559,7 @@ acc100_configure(const char *dev_name, struct rte_acc_conf *conf) struct acc_device *d = bbdev->data->dev_private; /* Store configuration */ - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); value = acc_reg_read(d, HwPfPcieGpexBridgeControl); bool firstCfg = (value != ACC100_CFG_PCI_BRIDGE); @@ -4955,7 +4954,7 @@ acc101_configure(const char *dev_name, struct rte_acc_conf *conf) struct acc_device *d = bbdev->data->dev_private; /* Store configuration */ - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); /* PCIe Bridge configuration */ acc_reg_write(d, HwPfPcieGpexBridgeControl, ACC101_CFG_PCI_BRIDGE); diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 686e086a5c5c..72f6bff16081 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -2450,15 +2450,13 @@ vrb_enqueue_ldpc_dec_one_op_cb(struct acc_queue *q, struct rte_bbdev_dec_op *op, uint8_t *prev_ptr = (uint8_t *) prev_desc; uint8_t *new_ptr = (uint8_t *) desc; /* Copy first 4 words and BDESCs. */ - rte_memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); - rte_memcpy(new_ptr + ACC_5GUL_OFFSET_0, - prev_ptr + ACC_5GUL_OFFSET_0, - ACC_5GUL_SIZE_1); + memcpy(new_ptr, prev_ptr, ACC_5GUL_SIZE_0); + memcpy(new_ptr + ACC_5GUL_OFFSET_0, + prev_ptr + ACC_5GUL_OFFSET_0, ACC_5GUL_SIZE_1); desc->req.op_addr = prev_desc->req.op_addr; /* Copy FCW. */ - rte_memcpy(new_ptr + ACC_DESC_FCW_OFFSET, - prev_ptr + ACC_DESC_FCW_OFFSET, - ACC_FCW_LD_BLEN); + memcpy(new_ptr + ACC_DESC_FCW_OFFSET, + prev_ptr + ACC_DESC_FCW_OFFSET, ACC_FCW_LD_BLEN); vrb_dma_desc_ld_update(op, &desc->req, input, h_output, &in_offset, &h_out_offset, &h_out_length, harq_layout); @@ -2566,7 +2564,8 @@ vrb_enqueue_ldpc_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op, fcw_offset = (desc_idx << 8) + ACC_DESC_FCW_OFFSET; desc->req.data_ptrs[0].address = q->ring_addr_iova + fcw_offset; desc->req.data_ptrs[0].blen = ACC_FCW_LD_BLEN; - rte_memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, ACC_FCW_LD_BLEN); + memcpy(&desc->req.fcw_ld, &desc_first->req.fcw_ld, + ACC_FCW_LD_BLEN); desc->req.fcw_ld.tb_trailer_size = (c - r - 1) * trail_len; ret = vrb_dma_desc_ld_fill(op, &desc->req, &input, h_output, &in_offset, &h_out_offset, @@ -4041,7 +4040,7 @@ enqueue_mldts_split_op(struct acc_queue *q, struct rte_bbdev_mldts_op *op, if (symb == 0) desc->req.cbs_in_tb = num_syms; else - rte_memcpy(&desc->req.fcw_mldts, fcw, ACC_FCW_MLDTS_BLEN); + memcpy(&desc->req.fcw_mldts, fcw, ACC_FCW_MLDTS_BLEN); desc->req.data_ptrs[1].address = rte_pktmbuf_iova_offset(input_q, in_offset); desc->req.data_ptrs[1].blen = q_size; in_offset += q_size; @@ -4396,7 +4395,7 @@ vrb1_configure(const char *dev_name, struct rte_acc_conf *conf) struct acc_device *d = bbdev->data->dev_private; /* Store configuration. */ - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); /* Check we are already out of PG. */ status = acc_reg_read(d, VRB1_PfHiSectionPowerGatingAck); @@ -4803,7 +4802,7 @@ vrb2_configure(const char *dev_name, struct rte_acc_conf *conf) struct acc_device *d = bbdev->data->dev_private; /* Store configuration. */ - rte_memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); + memcpy(&d->acc_conf, conf, sizeof(d->acc_conf)); /* Explicitly releasing AXI as this may be stopped after PF FLR/BME. */ address = VRB2_PfDmaAxiControl;