From patchwork Thu Feb 29 19:14:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arkadiusz Kusztal X-Patchwork-Id: 137520 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AFEE043B8D; Thu, 29 Feb 2024 20:14:50 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A007142FB2; Thu, 29 Feb 2024 20:14:40 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by mails.dpdk.org (Postfix) with ESMTP id 5D78C42F1D for ; Thu, 29 Feb 2024 20:14:38 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709234079; x=1740770079; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=UAcKQNxl4EoYX9S8S3MmTQqToS0iSyMPp4qyKcIGaUc=; b=EzFdAVA/l7eKwFpSldfAHUh5rU+SK2Ea+ymsg9obqfqOM+HidJYE/nCp t5WT0xBwE1guheQoBugDhzZsuKU84ox04kOLdKzF/wDYQfEwCsrwX2TmK ukhhpklB3WA1sFb1J1QabWs252G5VR+sGNtn/Rc8fSBpeXr+ASOTYRl90 gqvWD0ygBNzO2WvwBAeV1BlDBXjfOVqcLwZar56Xxkfaf7GmhUyILR6ys LSkQSy7i54TSpGLafnpvUyZuRq2gv5wzv95Xt8wGLTZxOB6vsHf83KHZh c5IrwgZaOaD3C95IZPi2S1P6BNFomjVH6smyJZzTFLGTFgsXXZCr8g15J A==; X-IronPort-AV: E=McAfee;i="6600,9927,10999"; a="3580508" X-IronPort-AV: E=Sophos;i="6.06,194,1705392000"; d="scan'208";a="3580508" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Feb 2024 11:14:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,194,1705392000"; d="scan'208";a="12619572" Received: from silpixa00400308.ir.intel.com ([10.237.214.154]) by orviesa005.jf.intel.com with ESMTP; 29 Feb 2024 11:14:36 -0800 From: Arkadiusz Kusztal To: dev@dpdk.org Cc: gakhil@marvell.com, ciara.power@intel.com, Arkadiusz Kusztal , vikash.chandrax.poddar@intel.com Subject: [PATCH v4 3/3] common/qat: fix incorrectly placed legacy flag Date: Thu, 29 Feb 2024 19:14:27 +0000 Message-Id: <20240229191427.1267-3-arkadiuszx.kusztal@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240229191427.1267-1-arkadiuszx.kusztal@intel.com> References: <20240229191427.1267-1-arkadiuszx.kusztal@intel.com> X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit fixes a legacy flag, which was placed in a file that may not be included in a building process. Fixes: cffb726b7797 ("crypto/qat: enable insecure algorithms") Cc: vikash.chandrax.poddar@intel.com Signed-off-by: Arkadiusz Kusztal --- drivers/common/qat/qat_device.c | 1 + drivers/crypto/qat/qat_sym.c | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index dab34dbcd5..3d99425751 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -31,6 +31,7 @@ struct qat_service qat_service[QAT_MAX_SERVICES]; /* per-process array of device data */ struct qat_device_info qat_pci_devs[RTE_PMD_QAT_MAX_PCI_DEVICES]; static int qat_nb_pci_devices; +int qat_legacy_capa; /* * The set of PCI devices this driver supports diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c index ac16051b19..6982ec2902 100644 --- a/drivers/crypto/qat/qat_sym.c +++ b/drivers/crypto/qat/qat_sym.c @@ -19,7 +19,6 @@ #include "qat_qp.h" uint8_t qat_sym_driver_id; -int qat_legacy_capa; #define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold" #define SYM_CIPHER_CRC_ENABLE_NAME "qat_sym_cipher_crc_enable"