From patchwork Thu Feb 29 16:05:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory Etelson X-Patchwork-Id: 137509 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5528443C3B; Thu, 29 Feb 2024 17:06:13 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 0AE2842F1D; Thu, 29 Feb 2024 17:06:08 +0100 (CET) Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2068.outbound.protection.outlook.com [40.107.243.68]) by mails.dpdk.org (Postfix) with ESMTP id 848B5402B4 for ; Thu, 29 Feb 2024 17:06:03 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BiOYb8iOzo8m7cAJtPal8HkBMcVJB/xO0tH/2GcrbhtASEv0BfDTRsUlgaQZyHTtyQDJRgCXn1PSrduB8YnftkjYNolQKQpzfOBraLCUNHFiYHHKYTOohwCopvwldfXAHaxn6bzFpsR/umnkHl4BMEZilqnwZx7m2k88pmQ439mR5rkL91RHQb+GU2lKrZyAVl8ddY17RiwyitatIwmUwpIC5QJNGTzmS25e5Z+PMG3rvzBJ84VIKosI8MBPNvwteWvcDpG+CnVmAZqQP5ea3cL62kxVLP32U5yYDR8uL7zrrrna73e+65TJjxyEX7yYC2lmYMBMv8vcS1+se5dN9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=M2sxg1wLSp28zC2JBVmNcnXyhrnwEWwlz7SxVvcXVKk=; b=eo9Tthc1E47mtruxneyhlEaxk5zyFyfIqHowC4D8ai0tzxCnhjvZgf9AcJjwWBCmlZDb5BX4Z+/uaKS6Kwseo95QUlrLwqh8XdfQxNZGYsnURpg6fB4c13sOixnCoZFhbTyS56yTlYPyklHl1toS6tDWWdW6wdJxYYTXeedBoqWVWHGW9odSczU/V81gWNCZG7zswOPWtOkgl9IZt7Iaz37N9XE6ZVeX3wMmHEPdi4w88qI56G67IaGFV+q/HXzj7zAWowTR8954fc764Gg3cqHFAHvV0UHQZvfWhTXUl7NitvR+koljHf/OQBxStJL19ksignTmtiw4TwS0HHxiUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.117.161) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=M2sxg1wLSp28zC2JBVmNcnXyhrnwEWwlz7SxVvcXVKk=; b=exKUbPjg/KYWtciTRUzck1uMpO40Vp9M0N7W4hLWtSp72AfRBbkFLOSeWWmWrCbXExaqNWx86YAAeLA7vlWMtw/pP3ZB67YvSaQReWPRkBwxkkkCSScAv3N6FgUzNcYLsQh/iI9qKrB6GIgI7C7Yf/JurQNKerOvSm6rlMcMdfiCLFtceVNP8Vdo4Wy+kRrnvOb2MI1Bw0XXG8KW4YYItOLjGbLE8ir/3xwl7lqbC/fcPzhnvNE73FNCF2PwHot0iRO5PRxfGqFlavt2OAcmdwKl/Tm5MqMw2LWk/VZpHdXGfN72ciMR7rL0OJGldiYzhCJ3p2wrVETXMYni9EQxpQ== Received: from SJ0PR03CA0026.namprd03.prod.outlook.com (2603:10b6:a03:33a::31) by SJ2PR12MB7991.namprd12.prod.outlook.com (2603:10b6:a03:4d1::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7316.36; Thu, 29 Feb 2024 16:06:00 +0000 Received: from MWH0EPF000971E4.namprd02.prod.outlook.com (2603:10b6:a03:33a:cafe::fc) by SJ0PR03CA0026.outlook.office365.com (2603:10b6:a03:33a::31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7339.28 via Frontend Transport; Thu, 29 Feb 2024 16:05:59 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.117.161) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by MWH0EPF000971E4.mail.protection.outlook.com (10.167.243.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7292.25 via Frontend Transport; Thu, 29 Feb 2024 16:05:59 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 29 Feb 2024 08:05:30 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Thu, 29 Feb 2024 08:05:26 -0800 From: Gregory Etelson To: CC: , , , "Ori Kam" , Dariusz Sosnowski , "Viacheslav Ovsiienko" , Suanming Mou , Matan Azrad , Yongseok Koh Subject: [PATCH 2/2] net/mlx5: fix IP-in-IP tunnels recognition Date: Thu, 29 Feb 2024 18:05:04 +0200 Message-ID: <20240229160505.630586-3-getelson@nvidia.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240229160505.630586-1-getelson@nvidia.com> References: <20240229160505.630586-1-getelson@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E4:EE_|SJ2PR12MB7991:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ced995b-cbfd-4189-4e66-08dc3940521f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: r9xJmTGF6289RcgGO9LxtnbHSj0mcv8U5Z+5J5ZTOnjK1mcJc8+tlAyImP7HIWQyNWXVcBwPMEzQYYdv+36hU+tvQhixE7MGFi6azJOOLcoX4ueDR49K06FU3mzl2KrM5xUFwzS02KXiMcbLt7PA9ZUXnjxQsXkjRfZtgfhCpz01pnXiMpob0SBMtIe71Yk3KIELc7ODSFsgRQtDQeaC2E5DBLKcTbTXKrAgIV0r/Xx2NEDeAu1dRrNCglYfRRYsWJ6+l0Q1vPPgvOJkKp0IuAFbwF1wWvHJIKvYf06g0Ukwu5eXg1gSHptJTFnKa3rlzW/TO7KWwSrKcO6tMeRsM88PDwMufDvTJek2i3BI5RT/ea4Xo5R9/oyqxKfgTnonqDM9B0bISGPu2PYBzPBD26bVCBLvamavbYhmys25PUvstrPBFg/avH6g5c/fKN+SUXc0T6MC7+P3W3YNFbe5bwSnqBEKBSV+DqHdHrOYWIbBaMUu1Nb94+7KmE8QIQv6xCjoUBSC93HROc+R1z93jd+JDNYW7bXWWdRan6oymvNdMYO9gwlk2P8DXDPjwiYGsjlFR8OZjn6Y+xtjBHJlJa6cdgqxEUGuUkVUw32A/v0f7BXH2yHXISS5EMoIvLLEjga+83gxeXuxLuC4j0BtChlpm7HVCN7bhO0J/h9hesXNM+nbSiW27FhfIcoN7p+d1wJ2uEVXNGdZi8HE+JTSkEtf3lRtqwBwuT6SOhjbjdARfv2TQnVNE2zNsIMHOPFQ X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230031)(36860700004)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Feb 2024 16:05:59.7303 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ced995b-cbfd-4189-4e66-08dc3940521f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E4.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB7991 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The patch fixes IP-in-IP tunnel recognition for the following patterns / [ipv4|ipv6] proto is [ipv4|ipv6] / end / [ipv4|ipv6] / [ipv4|ipv6] / Fixes: 3d69434113d1 ("net/mlx5: add Direct Verbs validation function") Signed-off-by: Gregory Etelson Acked-by: Ori Kam --- drivers/net/mlx5/mlx5_flow_dv.c | 104 ++++++++++++++++++++++++-------- 1 file changed, 80 insertions(+), 24 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index fe0a06f364..92a5b7b503 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -275,21 +275,41 @@ struct field_modify_info modify_tcp[] = { {0, 0, 0}, }; -static void +enum mlx5_l3_tunnel_detection { + l3_tunnel_none, + l3_tunnel_outer, + l3_tunnel_inner +}; + +static enum mlx5_l3_tunnel_detection mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused, - uint8_t next_protocol, uint64_t *item_flags, - int *tunnel) + uint8_t next_protocol, uint64_t item_flags, + uint64_t *l3_tunnel_flag) { + enum mlx5_l3_tunnel_detection td = l3_tunnel_none; + MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 || item->type == RTE_FLOW_ITEM_TYPE_IPV6); - if (next_protocol == IPPROTO_IPIP) { - *item_flags |= MLX5_FLOW_LAYER_IPIP; - *tunnel = 1; - } - if (next_protocol == IPPROTO_IPV6) { - *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP; - *tunnel = 1; + if ((item_flags & MLX5_FLOW_LAYER_OUTER_L3) == 0) { + switch (next_protocol) { + case IPPROTO_IPIP: + td = l3_tunnel_outer; + *l3_tunnel_flag = MLX5_FLOW_LAYER_IPIP; + break; + case IPPROTO_IPV6: + td = l3_tunnel_outer; + *l3_tunnel_flag = MLX5_FLOW_LAYER_IPV6_ENCAP; + break; + default: + break; + } + } else { + td = l3_tunnel_inner; + *l3_tunnel_flag = item->type == RTE_FLOW_ITEM_TYPE_IPV4 ? + MLX5_FLOW_LAYER_IPIP : + MLX5_FLOW_LAYER_IPV6_ENCAP; } + return td; } static inline struct mlx5_hlist * @@ -7718,6 +7738,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, return ret; is_root = (uint64_t)ret; for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { + enum mlx5_l3_tunnel_detection l3_tunnel_detection; + uint64_t l3_tunnel_flag; int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); int type = items->type; @@ -7795,8 +7817,16 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, vlan_m = items->mask; break; case RTE_FLOW_ITEM_TYPE_IPV4: - mlx5_flow_tunnel_ip_check(items, next_protocol, - &item_flags, &tunnel); + next_protocol = mlx5_flow_l3_next_protocol + (items, (enum MLX5_SET_MATCHER)-1); + l3_tunnel_detection = + mlx5_flow_tunnel_ip_check(items, next_protocol, + item_flags, + &l3_tunnel_flag); + if (l3_tunnel_detection == l3_tunnel_inner) { + item_flags |= l3_tunnel_flag; + tunnel = 1; + } ret = flow_dv_validate_item_ipv4(dev, items, item_flags, last_item, ether_type, error); @@ -7804,12 +7834,20 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, return ret; last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : MLX5_FLOW_LAYER_OUTER_L3_IPV4; - next_protocol = mlx5_flow_l3_next_protocol - (items, (enum MLX5_SET_MATCHER)-1); + if (l3_tunnel_detection == l3_tunnel_outer) + item_flags |= l3_tunnel_flag; break; case RTE_FLOW_ITEM_TYPE_IPV6: - mlx5_flow_tunnel_ip_check(items, next_protocol, - &item_flags, &tunnel); + next_protocol = mlx5_flow_l3_next_protocol + (items, (enum MLX5_SET_MATCHER)-1); + l3_tunnel_detection = + mlx5_flow_tunnel_ip_check(items, next_protocol, + item_flags, + &l3_tunnel_flag); + if (l3_tunnel_detection == l3_tunnel_inner) { + item_flags |= l3_tunnel_flag; + tunnel = 1; + } ret = mlx5_flow_validate_item_ipv6(items, item_flags, last_item, ether_type, @@ -7819,8 +7857,8 @@ flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr, return ret; last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : MLX5_FLOW_LAYER_OUTER_L3_IPV6; - next_protocol = mlx5_flow_l3_next_protocol - (items, (enum MLX5_SET_MATCHER)-1); + if (l3_tunnel_detection == l3_tunnel_outer) + item_flags |= l3_tunnel_flag; break; case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT: ret = flow_dv_validate_item_ipv6_frag_ext(items, @@ -13945,6 +13983,8 @@ flow_dv_translate_items(struct rte_eth_dev *dev, int tunnel = !!(wks->item_flags & MLX5_FLOW_LAYER_TUNNEL); int item_type = items->type; uint64_t last_item = wks->last_item; + enum mlx5_l3_tunnel_detection l3_tunnel_detection; + uint64_t l3_tunnel_flag; int ret; switch (item_type) { @@ -13988,24 +14028,40 @@ flow_dv_translate_items(struct rte_eth_dev *dev, MLX5_FLOW_LAYER_OUTER_VLAN); break; case RTE_FLOW_ITEM_TYPE_IPV4: - mlx5_flow_tunnel_ip_check(items, next_protocol, - &wks->item_flags, &tunnel); + next_protocol = mlx5_flow_l3_next_protocol(items, key_type); + l3_tunnel_detection = + mlx5_flow_tunnel_ip_check(items, next_protocol, + wks->item_flags, + &l3_tunnel_flag); + if (l3_tunnel_detection == l3_tunnel_inner) { + wks->item_flags |= l3_tunnel_flag; + tunnel = 1; + } flow_dv_translate_item_ipv4(key, items, tunnel, wks->group, key_type); wks->priority = MLX5_PRIORITY_MAP_L3; last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : MLX5_FLOW_LAYER_OUTER_L3_IPV4; - next_protocol = mlx5_flow_l3_next_protocol(items, key_type); + if (l3_tunnel_detection == l3_tunnel_outer) + wks->item_flags |= l3_tunnel_flag; break; case RTE_FLOW_ITEM_TYPE_IPV6: - mlx5_flow_tunnel_ip_check(items, next_protocol, - &wks->item_flags, &tunnel); + next_protocol = mlx5_flow_l3_next_protocol(items, key_type); + l3_tunnel_detection = + mlx5_flow_tunnel_ip_check(items, next_protocol, + wks->item_flags, + &l3_tunnel_flag); + if (l3_tunnel_detection == l3_tunnel_inner) { + wks->item_flags |= l3_tunnel_flag; + tunnel = 1; + } flow_dv_translate_item_ipv6(key, items, tunnel, wks->group, key_type); wks->priority = MLX5_PRIORITY_MAP_L3; last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : MLX5_FLOW_LAYER_OUTER_L3_IPV6; - next_protocol = mlx5_flow_l3_next_protocol(items, key_type); + if (l3_tunnel_detection == l3_tunnel_outer) + wks->item_flags |= l3_tunnel_flag; break; case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT: flow_dv_translate_item_ipv6_frag_ext