[v5,14/14] net/cnxk: fix mbuf fields in multi-seg Tx path
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Commit Message
From: Rahul Bhansali <rbhansali@marvell.com>
Currently in debug mode when a buffer is allocated in SW,
nb_segs will have invalid values as it didn't come from driver
Rx path. Hence reset mbuf next and nb_segs fields in multi-seg Tx path.
Fixes: 3626d5195d49 ("net/cnxk: add multi-segment Tx for CN10K")
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
---
drivers/net/cnxk/cn10k_tx.h | 2 ++
drivers/net/cnxk/cn9k_tx.h | 20 ++++++++++++++++++++
2 files changed, 22 insertions(+)
Comments
On Mon, Feb 26, 2024 at 7:07 PM Nithin Dabilpuram
<ndabilpuram@marvell.com> wrote:
>
> From: Rahul Bhansali <rbhansali@marvell.com>
>
> Currently in debug mode when a buffer is allocated in SW,
> nb_segs will have invalid values as it didn't come from driver
> Rx path. Hence reset mbuf next and nb_segs fields in multi-seg Tx path.
>
> Fixes: 3626d5195d49 ("net/cnxk: add multi-segment Tx for CN10K")
>
> Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Series applied to dpdk-next-net-mrvl/for-main. Thanks
@@ -1328,6 +1328,7 @@ cn10k_nix_prepare_mseg(struct cn10k_eth_txq *txq,
nb_segs = m->nb_segs - 1;
m_next = m->next;
m->next = NULL;
+ m->nb_segs = 1;
slist = &cmd[3 + off + 1];
cookie = RTE_MBUF_DIRECT(m) ? m : rte_mbuf_from_indirect(m);
@@ -1873,6 +1874,7 @@ cn10k_nix_prepare_mseg_vec_list(struct rte_mbuf *m, uint64_t *cmd,
nb_segs = m->nb_segs - 1;
m_next = m->next;
m->next = NULL;
+ m->nb_segs = 1;
m = m_next;
/* Fill mbuf segments */
do {
@@ -647,6 +647,10 @@ cn9k_nix_prepare_mseg(struct cn9k_eth_txq *txq,
rte_io_wmb();
#else
RTE_SET_USED(cookie);
+#endif
+#ifdef RTE_ENABLE_ASSERT
+ m->next = NULL;
+ m->nb_segs = 1;
#endif
m = m_next;
if (!m)
@@ -683,6 +687,9 @@ cn9k_nix_prepare_mseg(struct cn9k_eth_txq *txq,
sg_u = sg->u;
slist++;
}
+#ifdef RTE_ENABLE_ASSERT
+ m->next = NULL;
+#endif
m = m_next;
} while (nb_segs);
@@ -696,6 +703,9 @@ cn9k_nix_prepare_mseg(struct cn9k_eth_txq *txq,
segdw += (off >> 1) + 1 + !!(flags & NIX_TX_OFFLOAD_TSTAMP_F);
send_hdr->w0.sizem1 = segdw - 1;
+#ifdef RTE_ENABLE_ASSERT
+ rte_io_wmb();
+#endif
return segdw;
}
@@ -912,6 +922,10 @@ cn9k_nix_prepare_mseg_vec_list(struct cn9k_eth_txq *txq,
RTE_SET_USED(cookie);
#endif
+#ifdef RTE_ENABLE_ASSERT
+ m->next = NULL;
+ m->nb_segs = 1;
+#endif
m = m_next;
/* Fill mbuf segments */
do {
@@ -942,6 +956,9 @@ cn9k_nix_prepare_mseg_vec_list(struct cn9k_eth_txq *txq,
sg_u = sg->u;
slist++;
}
+#ifdef RTE_ENABLE_ASSERT
+ m->next = NULL;
+#endif
m = m_next;
} while (nb_segs);
@@ -957,6 +974,9 @@ cn9k_nix_prepare_mseg_vec_list(struct cn9k_eth_txq *txq,
!!(flags & NIX_TX_OFFLOAD_TSTAMP_F);
send_hdr->w0.sizem1 = segdw - 1;
+#ifdef RTE_ENABLE_ASSERT
+ rte_io_wmb();
+#endif
return segdw;
}