From patchwork Sun Jan 21 15:21:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 136012 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB0564391E; Sun, 21 Jan 2024 16:43:54 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3EDBE402C8; Sun, 21 Jan 2024 16:43:54 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id EBE374027D for ; Sun, 21 Jan 2024 16:43:51 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40LDrUC3023931; Sun, 21 Jan 2024 07:43:48 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= pfpt0220; bh=N++LX0HO64Me14ATRTnlKdmTCL8B8zjH97Q1Y/DjZoY=; b=i2R Zs1kDzFvBCazlwtY8DV8eEWdmZwyXt37e/WrsANNyEQ9b4VVHJ28Me2dQCcMa4di MgSx6vFTCX+FayOiurvvxOdA1rSiMQX4YjxiFiG0GCrvaRKsvsK/xyPV34r7zs2+ iNuYZEX3O6nBfPYMVHcmTSPFvc6VZy7RtM3VPEC2E2Cv+9dZMCiNevlNp0UyDud2 +aiXnzpMN7+FysFLTT9cOUPhU85ViJnYC4SRZNmVCRfXbSGZJJM25rEuOPfTHy40 lo2NJ4heXwNIybVJORmHLVoOWAha9IBka7nTHTg0kuc4j/lZ9lMIf9+gNjeqwfLT wiFFKgX8wdlUTvQdD7Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3vrejnac3m-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 21 Jan 2024 07:43:48 -0800 (PST) Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sun, 21 Jan 2024 07:43:46 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sun, 21 Jan 2024 07:43:46 -0800 Received: from MININT-80QBFE8.corp.innovium.com (MININT-80QBFE8.marvell.com [10.28.164.106]) by maili.marvell.com (Postfix) with ESMTP id 426465C7774; Sun, 21 Jan 2024 07:21:31 -0800 (PST) From: To: , , , Ruifeng Wang , Bruce Richardson CC: , Pavan Nikhilesh Subject: [PATCH v3 1/2] config/arm: allow WFE to be enabled config time Date: Sun, 21 Jan 2024 20:51:27 +0530 Message-ID: <20240121152128.6360-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117142600.1889-1-pbhagavatula@marvell.com> References: <20240117142600.1889-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 41fiSfFmEaBsAd8reWwpsSoM3XSOnHkU X-Proofpoint-GUID: 41fiSfFmEaBsAd8reWwpsSoM3XSOnHkU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-20_06,2024-01-19_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Allow RTE_ARM_USE_WFE to be enabled at meson configuration time by passing it via c_args instead of modifying `config/arm/meson.build`. Example usage: meson build -Dc_args='-DRTE_ARM_USE_WFE' \ --cross-file config/arm/arm64_cn10k_linux_gcc Signed-off-by: Pavan Nikhilesh Acked-by: Chengwen Feng Acked-by: Ruifeng Wang --- v3 Changes: - Comment the meson option instead of removing it. config/arm/meson.build | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/config/arm/meson.build b/config/arm/meson.build index 36f21d2259..89e1de312b 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -17,7 +17,9 @@ flags_common = [ # ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF], # ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false], - ['RTE_ARM_USE_WFE', false], + # Enable use of ARM wait for event instruction. + # ['RTE_ARM_USE_WFE', false], + ['RTE_ARCH_ARM64', true], ['RTE_CACHE_LINE_SIZE', 128] ]