diff mbox series

[v1] net/axgbe: read and save the port property register

Message ID 20240105113250.11492-1-venkatkumar.ande@amd.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series [v1] net/axgbe: read and save the port property register |

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Commit Message

Venkat Kumar Ande Jan. 5, 2024, 11:32 a.m. UTC 
  From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>

Read and save the port property registers once during the device probe
and then use the saved values as they are needed.

Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
---
 drivers/net/axgbe/axgbe_ethdev.c   | 21 +++++----
 drivers/net/axgbe/axgbe_ethdev.h   |  7 +++
 drivers/net/axgbe/axgbe_phy_impl.c | 68 ++++++++++++------------------
 3 files changed, 48 insertions(+), 48 deletions(-)

Comments

Sebastian, Selwin Jan. 8, 2024, 9:10 a.m. UTC | #1 
[AMD Official Use Only - General]

Acked-by: Selwin Sebastian<selwin.sebastian@amd.com>

-----Original Message-----
From: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
Sent: Friday, January 5, 2024 5:03 PM
To: dev@dpdk.org
Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>; Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
Subject: [PATCH v1] net/axgbe: read and save the port property register

From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>

Read and save the port property registers once during the device probe and then use the saved values as they are needed.

Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
---
 drivers/net/axgbe/axgbe_ethdev.c   | 21 +++++----
 drivers/net/axgbe/axgbe_ethdev.h   |  7 +++
 drivers/net/axgbe/axgbe_phy_impl.c | 68 ++++++++++++------------------
 3 files changed, 48 insertions(+), 48 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index f174d46143..3450374535 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -2342,23 +2342,28 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
        pdata->arcache = AXGBE_DMA_OS_ARCACHE;
        pdata->awcache = AXGBE_DMA_OS_AWCACHE;

+       /* Read the port property registers */
+       pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
+       pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
+       pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
+       pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
+       pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
+
        /* Set the maximum channels and queues */
-       reg = XP_IOREAD(pdata, XP_PROP_1);
-       pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA);
-       pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA);
-       pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES);
-       pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES);
+       pdata->tx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_DMA);
+       pdata->rx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_RX_DMA);
+       pdata->tx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_QUEUES);
+       pdata->rx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1,
+MAX_RX_QUEUES);

        /* Set the hardware channel and queue counts */
        axgbe_set_counts(pdata);

        /* Set the maximum fifo amounts */
-       reg = XP_IOREAD(pdata, XP_PROP_2);
-       pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE);
+       pdata->tx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2,
+TX_FIFO_SIZE);
        pdata->tx_max_fifo_size *= 16384;
        pdata->tx_max_fifo_size = RTE_MIN(pdata->tx_max_fifo_size,
                                          pdata->vdata->tx_max_fifo_size);
-       pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE);
+       pdata->rx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2,
+RX_FIFO_SIZE);
        pdata->rx_max_fifo_size *= 16384;
        pdata->rx_max_fifo_size = RTE_MIN(pdata->rx_max_fifo_size,
                                          pdata->vdata->rx_max_fifo_size); diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index 7f19321d88..df5d63c493 100644
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -539,6 +539,13 @@ struct axgbe_port {
        void *xprop_regs;       /* AXGBE property registers */
        void *xi2c_regs;        /* AXGBE I2C CSRs */

+       /* Port property registers */
+       unsigned int pp0;
+       unsigned int pp1;
+       unsigned int pp2;
+       unsigned int pp3;
+       unsigned int pp4;
+
        bool cdr_track_early;
        /* XPCS indirect addressing lock */
        unsigned int xpcs_window_def_reg;
diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index d97fbbfddd..44ff28517c 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -1709,40 +1709,35 @@ static int axgbe_phy_link_status(struct axgbe_port *pdata, int *an_restart)  static void axgbe_phy_sfp_gpio_setup(struct axgbe_port *pdata)  {
        struct axgbe_phy_data *phy_data = pdata->phy_data;
-       unsigned int reg;
-
-       reg = XP_IOREAD(pdata, XP_PROP_3);

        phy_data->sfp_gpio_address = AXGBE_GPIO_ADDRESS_PCA9555 +
-               XP_GET_BITS(reg, XP_PROP_3, GPIO_ADDR);
+               XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_ADDR);

-       phy_data->sfp_gpio_mask = XP_GET_BITS(reg, XP_PROP_3, GPIO_MASK);
+       phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3,
+GPIO_MASK);

-       phy_data->sfp_gpio_rx_los = XP_GET_BITS(reg, XP_PROP_3,
+       phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                GPIO_RX_LOS);
-       phy_data->sfp_gpio_tx_fault = XP_GET_BITS(reg, XP_PROP_3,
+       phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                  GPIO_TX_FAULT);
-       phy_data->sfp_gpio_mod_absent = XP_GET_BITS(reg, XP_PROP_3,
+       phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                    GPIO_MOD_ABS);
-       phy_data->sfp_gpio_rate_select = XP_GET_BITS(reg, XP_PROP_3,
+       phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                     GPIO_RATE_SELECT);
 }

 static void axgbe_phy_sfp_comm_setup(struct axgbe_port *pdata)  {
        struct axgbe_phy_data *phy_data = pdata->phy_data;
-       unsigned int reg, mux_addr_hi, mux_addr_lo;
+       unsigned int mux_addr_hi, mux_addr_lo;

-       reg = XP_IOREAD(pdata, XP_PROP_4);
-
-       mux_addr_hi = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_HI);
-       mux_addr_lo = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_LO);
+       mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI);
+       mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO);
        if (mux_addr_lo == AXGBE_SFP_DIRECT)
                return;

        phy_data->sfp_comm = AXGBE_SFP_COMM_PCA9545;
        phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo;
-       phy_data->sfp_mux_channel = XP_GET_BITS(reg, XP_PROP_4, MUX_CHAN);
+       phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4,
+MUX_CHAN);
 }

 static void axgbe_phy_sfp_setup(struct axgbe_port *pdata) @@ -1778,12 +1773,11 @@ static bool axgbe_phy_redrv_error(struct axgbe_phy_data *phy_data)  static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata)  {
        struct axgbe_phy_data *phy_data = pdata->phy_data;
-       unsigned int reg;

        if (phy_data->conn_type != AXGBE_CONN_TYPE_MDIO)
                return 0;
-       reg = XP_IOREAD(pdata, XP_PROP_3);
-       phy_data->mdio_reset = XP_GET_BITS(reg, XP_PROP_3, MDIO_RESET);
+
+       phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET);
        switch (phy_data->mdio_reset) {
        case AXGBE_MDIO_RESET_NONE:
        case AXGBE_MDIO_RESET_I2C_GPIO:
@@ -1796,12 +1790,12 @@ static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata)
        }
        if (phy_data->mdio_reset == AXGBE_MDIO_RESET_I2C_GPIO) {
                phy_data->mdio_reset_addr = AXGBE_GPIO_ADDRESS_PCA9555 +
-                       XP_GET_BITS(reg, XP_PROP_3,
+                       XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                    MDIO_RESET_I2C_ADDR);
-               phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3,
+               phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                        MDIO_RESET_I2C_GPIO);
        } else if (phy_data->mdio_reset == AXGBE_MDIO_RESET_INT_GPIO) {
-               phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3,
+               phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
                                                        MDIO_RESET_INT_GPIO);
        }

@@ -1893,12 +1887,9 @@ static bool axgbe_phy_conn_type_mismatch(struct axgbe_port *pdata)

 static bool axgbe_phy_port_enabled(struct axgbe_port *pdata)  {
-       unsigned int reg;
-
-       reg = XP_IOREAD(pdata, XP_PROP_0);
-       if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS))
+       if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS))
                return false;
-       if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE))
+       if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE))
                return false;

        return true;
@@ -2061,7 +2052,6 @@ static int axgbe_phy_reset(struct axgbe_port *pdata)  static int axgbe_phy_init(struct axgbe_port *pdata)  {
        struct axgbe_phy_data *phy_data;
-       unsigned int reg;
        int ret;

        /* Check if enabled */
@@ -2082,19 +2072,17 @@ static int axgbe_phy_init(struct axgbe_port *pdata)
        }
        pdata->phy_data = phy_data;

-       reg = XP_IOREAD(pdata, XP_PROP_0);
-       phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE);
-       phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID);
-       phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS);
-       phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE);
-       phy_data->mdio_addr = XP_GET_BITS(reg, XP_PROP_0, MDIO_ADDR);
-
-       reg = XP_IOREAD(pdata, XP_PROP_4);
-       phy_data->redrv = XP_GET_BITS(reg, XP_PROP_4, REDRV_PRESENT);
-       phy_data->redrv_if = XP_GET_BITS(reg, XP_PROP_4, REDRV_IF);
-       phy_data->redrv_addr = XP_GET_BITS(reg, XP_PROP_4, REDRV_ADDR);
-       phy_data->redrv_lane = XP_GET_BITS(reg, XP_PROP_4, REDRV_LANE);
-       phy_data->redrv_model = XP_GET_BITS(reg, XP_PROP_4, REDRV_MODEL);
+       phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE);
+       phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID);
+       phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS);
+       phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE);
+       phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR);
+
+       phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT);
+       phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF);
+       phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR);
+       phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE);
+       phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4,
+REDRV_MODEL);

        /* Validate the connection requested */
        if (axgbe_phy_conn_type_mismatch(pdata)) {
--
2.34.1
Ferruh Yigit Jan. 9, 2024, 10:35 a.m. UTC | #2 
On 1/5/2024 11:32 AM, Venkat Kumar Ande wrote:
> From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
> 
> Read and save the port property registers once during the device probe
> and then use the saved values as they are needed.
> 

Hi Venkat,

Can you please describe what is the motivation/reason for the change?

Is it addressing a functional problem or refactoring for coming feature
etc...?

> Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
> ---
>  drivers/net/axgbe/axgbe_ethdev.c   | 21 +++++----
>  drivers/net/axgbe/axgbe_ethdev.h   |  7 +++
>  drivers/net/axgbe/axgbe_phy_impl.c | 68 ++++++++++++------------------
>  3 files changed, 48 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
> index f174d46143..3450374535 100644
> --- a/drivers/net/axgbe/axgbe_ethdev.c
> +++ b/drivers/net/axgbe/axgbe_ethdev.c
> @@ -2342,23 +2342,28 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>  	pdata->arcache = AXGBE_DMA_OS_ARCACHE;
>  	pdata->awcache = AXGBE_DMA_OS_AWCACHE;
>  
> +	/* Read the port property registers */
> +	pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
> +	pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
> +	pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
> +	pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
> +	pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
> +

<...>
Venkat Kumar Ande Jan. 9, 2024, 11:14 a.m. UTC | #3 
[AMD Official Use Only - General]

Hi Ferruh,

This change will be refactoring for future code readability of AMD AXGBE driver.

Regards,
Venkat

-----Original Message-----
From: Yigit, Ferruh <Ferruh.Yigit@amd.com>
Sent: Tuesday, January 9, 2024 4:05 PM
To: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>; dev@dpdk.org
Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>
Subject: Re: [PATCH v1] net/axgbe: read and save the port property register

On 1/5/2024 11:32 AM, Venkat Kumar Ande wrote:
> From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
>
> Read and save the port property registers once during the device probe
> and then use the saved values as they are needed.
>

Hi Venkat,

Can you please describe what is the motivation/reason for the change?

Is it addressing a functional problem or refactoring for coming feature etc...?

> Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
> ---
>  drivers/net/axgbe/axgbe_ethdev.c   | 21 +++++----
>  drivers/net/axgbe/axgbe_ethdev.h   |  7 +++
>  drivers/net/axgbe/axgbe_phy_impl.c | 68
> ++++++++++++------------------
>  3 files changed, 48 insertions(+), 48 deletions(-)
>
> diff --git a/drivers/net/axgbe/axgbe_ethdev.c
> b/drivers/net/axgbe/axgbe_ethdev.c
> index f174d46143..3450374535 100644
> --- a/drivers/net/axgbe/axgbe_ethdev.c
> +++ b/drivers/net/axgbe/axgbe_ethdev.c
> @@ -2342,23 +2342,28 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>       pdata->arcache = AXGBE_DMA_OS_ARCACHE;
>       pdata->awcache = AXGBE_DMA_OS_AWCACHE;
>
> +     /* Read the port property registers */
> +     pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
> +     pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
> +     pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
> +     pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
> +     pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
> +

<...>
Ferruh Yigit Jan. 9, 2024, 6:07 p.m. UTC | #4 
On 1/9/2024 11:14 AM, Ande, Venkat Kumar wrote:
> [AMD Official Use Only - General]
> 
> Hi Ferruh,
> 
> This change will be refactoring for future code readability of AMD AXGBE driver.
> 

Thanks for clarification, I can update commit log with this info while
merging.


> Regards,
> Venkat
> 
> -----Original Message-----
> From: Yigit, Ferruh <Ferruh.Yigit@amd.com>
> Sent: Tuesday, January 9, 2024 4:05 PM
> To: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>; dev@dpdk.org
> Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>
> Subject: Re: [PATCH v1] net/axgbe: read and save the port property register
> 
> On 1/5/2024 11:32 AM, Venkat Kumar Ande wrote:
>> From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
>>
>> Read and save the port property registers once during the device probe
>> and then use the saved values as they are needed.
>>
> 
> Hi Venkat,
> 
> Can you please describe what is the motivation/reason for the change?
> 
> Is it addressing a functional problem or refactoring for coming feature etc...?
> 
>> Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
>> ---
>>  drivers/net/axgbe/axgbe_ethdev.c   | 21 +++++----
>>  drivers/net/axgbe/axgbe_ethdev.h   |  7 +++
>>  drivers/net/axgbe/axgbe_phy_impl.c | 68
>> ++++++++++++------------------
>>  3 files changed, 48 insertions(+), 48 deletions(-)
>>
>> diff --git a/drivers/net/axgbe/axgbe_ethdev.c
>> b/drivers/net/axgbe/axgbe_ethdev.c
>> index f174d46143..3450374535 100644
>> --- a/drivers/net/axgbe/axgbe_ethdev.c
>> +++ b/drivers/net/axgbe/axgbe_ethdev.c
>> @@ -2342,23 +2342,28 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
>>       pdata->arcache = AXGBE_DMA_OS_ARCACHE;
>>       pdata->awcache = AXGBE_DMA_OS_AWCACHE;
>>
>> +     /* Read the port property registers */
>> +     pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
>> +     pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
>> +     pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
>> +     pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
>> +     pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
>> +
> 
> <...>
>
Ferruh Yigit Jan. 10, 2024, 3:56 p.m. UTC | #5 
On 1/8/2024 9:10 AM, Sebastian, Selwin wrote:

> -----Original Message-----
> From: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
> Sent: Friday, January 5, 2024 5:03 PM
> To: dev@dpdk.org
> Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>; Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
> Subject: [PATCH v1] net/axgbe: read and save the port property register
> 
> From: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
> 
> Read and save the port property registers once during the device probe and then use the saved values as they are needed.
> 
> Signed-off-by: Venkat Kumar Ande <VenkatKumar.Ande@amd.com>
>
> Acked-by: Selwin Sebastian<selwin.sebastian@amd.com>
>

Commit log updated to note that refactoring is to improve code readability.

Applied to dpdk-next-net/main, thanks.
diff mbox series

Patch

diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index f174d46143..3450374535 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -2342,23 +2342,28 @@  eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	pdata->arcache = AXGBE_DMA_OS_ARCACHE;
 	pdata->awcache = AXGBE_DMA_OS_AWCACHE;
 
+	/* Read the port property registers */
+	pdata->pp0 = XP_IOREAD(pdata, XP_PROP_0);
+	pdata->pp1 = XP_IOREAD(pdata, XP_PROP_1);
+	pdata->pp2 = XP_IOREAD(pdata, XP_PROP_2);
+	pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);
+	pdata->pp4 = XP_IOREAD(pdata, XP_PROP_4);
+
 	/* Set the maximum channels and queues */
-	reg = XP_IOREAD(pdata, XP_PROP_1);
-	pdata->tx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_DMA);
-	pdata->rx_max_channel_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_DMA);
-	pdata->tx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_TX_QUEUES);
-	pdata->rx_max_q_count = XP_GET_BITS(reg, XP_PROP_1, MAX_RX_QUEUES);
+	pdata->tx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_DMA);
+	pdata->rx_max_channel_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_RX_DMA);
+	pdata->tx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_TX_QUEUES);
+	pdata->rx_max_q_count = XP_GET_BITS(pdata->pp1, XP_PROP_1, MAX_RX_QUEUES);
 
 	/* Set the hardware channel and queue counts */
 	axgbe_set_counts(pdata);
 
 	/* Set the maximum fifo amounts */
-	reg = XP_IOREAD(pdata, XP_PROP_2);
-	pdata->tx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, TX_FIFO_SIZE);
+	pdata->tx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, TX_FIFO_SIZE);
 	pdata->tx_max_fifo_size *= 16384;
 	pdata->tx_max_fifo_size = RTE_MIN(pdata->tx_max_fifo_size,
 					  pdata->vdata->tx_max_fifo_size);
-	pdata->rx_max_fifo_size = XP_GET_BITS(reg, XP_PROP_2, RX_FIFO_SIZE);
+	pdata->rx_max_fifo_size = XP_GET_BITS(pdata->pp2, XP_PROP_2, RX_FIFO_SIZE);
 	pdata->rx_max_fifo_size *= 16384;
 	pdata->rx_max_fifo_size = RTE_MIN(pdata->rx_max_fifo_size,
 					  pdata->vdata->rx_max_fifo_size);
diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index 7f19321d88..df5d63c493 100644
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -539,6 +539,13 @@  struct axgbe_port {
 	void *xprop_regs;	/* AXGBE property registers */
 	void *xi2c_regs;	/* AXGBE I2C CSRs */
 
+	/* Port property registers */
+	unsigned int pp0;
+	unsigned int pp1;
+	unsigned int pp2;
+	unsigned int pp3;
+	unsigned int pp4;
+
 	bool cdr_track_early;
 	/* XPCS indirect addressing lock */
 	unsigned int xpcs_window_def_reg;
diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index d97fbbfddd..44ff28517c 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -1709,40 +1709,35 @@  static int axgbe_phy_link_status(struct axgbe_port *pdata, int *an_restart)
 static void axgbe_phy_sfp_gpio_setup(struct axgbe_port *pdata)
 {
 	struct axgbe_phy_data *phy_data = pdata->phy_data;
-	unsigned int reg;
-
-	reg = XP_IOREAD(pdata, XP_PROP_3);
 
 	phy_data->sfp_gpio_address = AXGBE_GPIO_ADDRESS_PCA9555 +
-		XP_GET_BITS(reg, XP_PROP_3, GPIO_ADDR);
+		XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_ADDR);
 
-	phy_data->sfp_gpio_mask = XP_GET_BITS(reg, XP_PROP_3, GPIO_MASK);
+	phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_MASK);
 
-	phy_data->sfp_gpio_rx_los = XP_GET_BITS(reg, XP_PROP_3,
+	phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 						GPIO_RX_LOS);
-	phy_data->sfp_gpio_tx_fault = XP_GET_BITS(reg, XP_PROP_3,
+	phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 						  GPIO_TX_FAULT);
-	phy_data->sfp_gpio_mod_absent = XP_GET_BITS(reg, XP_PROP_3,
+	phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 						    GPIO_MOD_ABS);
-	phy_data->sfp_gpio_rate_select = XP_GET_BITS(reg, XP_PROP_3,
+	phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 						     GPIO_RATE_SELECT);
 }
 
 static void axgbe_phy_sfp_comm_setup(struct axgbe_port *pdata)
 {
 	struct axgbe_phy_data *phy_data = pdata->phy_data;
-	unsigned int reg, mux_addr_hi, mux_addr_lo;
+	unsigned int mux_addr_hi, mux_addr_lo;
 
-	reg = XP_IOREAD(pdata, XP_PROP_4);
-
-	mux_addr_hi = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_HI);
-	mux_addr_lo = XP_GET_BITS(reg, XP_PROP_4, MUX_ADDR_LO);
+	mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI);
+	mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO);
 	if (mux_addr_lo == AXGBE_SFP_DIRECT)
 		return;
 
 	phy_data->sfp_comm = AXGBE_SFP_COMM_PCA9545;
 	phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo;
-	phy_data->sfp_mux_channel = XP_GET_BITS(reg, XP_PROP_4, MUX_CHAN);
+	phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_CHAN);
 }
 
 static void axgbe_phy_sfp_setup(struct axgbe_port *pdata)
@@ -1778,12 +1773,11 @@  static bool axgbe_phy_redrv_error(struct axgbe_phy_data *phy_data)
 static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata)
 {
 	struct axgbe_phy_data *phy_data = pdata->phy_data;
-	unsigned int reg;
 
 	if (phy_data->conn_type != AXGBE_CONN_TYPE_MDIO)
 		return 0;
-	reg = XP_IOREAD(pdata, XP_PROP_3);
-	phy_data->mdio_reset = XP_GET_BITS(reg, XP_PROP_3, MDIO_RESET);
+
+	phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET);
 	switch (phy_data->mdio_reset) {
 	case AXGBE_MDIO_RESET_NONE:
 	case AXGBE_MDIO_RESET_I2C_GPIO:
@@ -1796,12 +1790,12 @@  static int axgbe_phy_mdio_reset_setup(struct axgbe_port *pdata)
 	}
 	if (phy_data->mdio_reset == AXGBE_MDIO_RESET_I2C_GPIO) {
 		phy_data->mdio_reset_addr = AXGBE_GPIO_ADDRESS_PCA9555 +
-			XP_GET_BITS(reg, XP_PROP_3,
+			XP_GET_BITS(pdata->pp3, XP_PROP_3,
 				    MDIO_RESET_I2C_ADDR);
-		phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3,
+		phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 							MDIO_RESET_I2C_GPIO);
 	} else if (phy_data->mdio_reset == AXGBE_MDIO_RESET_INT_GPIO) {
-		phy_data->mdio_reset_gpio = XP_GET_BITS(reg, XP_PROP_3,
+		phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,
 							MDIO_RESET_INT_GPIO);
 	}
 
@@ -1893,12 +1887,9 @@  static bool axgbe_phy_conn_type_mismatch(struct axgbe_port *pdata)
 
 static bool axgbe_phy_port_enabled(struct axgbe_port *pdata)
 {
-	unsigned int reg;
-
-	reg = XP_IOREAD(pdata, XP_PROP_0);
-	if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS))
+	if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS))
 		return false;
-	if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE))
+	if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE))
 		return false;
 
 	return true;
@@ -2061,7 +2052,6 @@  static int axgbe_phy_reset(struct axgbe_port *pdata)
 static int axgbe_phy_init(struct axgbe_port *pdata)
 {
 	struct axgbe_phy_data *phy_data;
-	unsigned int reg;
 	int ret;
 
 	/* Check if enabled */
@@ -2082,19 +2072,17 @@  static int axgbe_phy_init(struct axgbe_port *pdata)
 	}
 	pdata->phy_data = phy_data;
 
-	reg = XP_IOREAD(pdata, XP_PROP_0);
-	phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE);
-	phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID);
-	phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS);
-	phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE);
-	phy_data->mdio_addr = XP_GET_BITS(reg, XP_PROP_0, MDIO_ADDR);
-
-	reg = XP_IOREAD(pdata, XP_PROP_4);
-	phy_data->redrv = XP_GET_BITS(reg, XP_PROP_4, REDRV_PRESENT);
-	phy_data->redrv_if = XP_GET_BITS(reg, XP_PROP_4, REDRV_IF);
-	phy_data->redrv_addr = XP_GET_BITS(reg, XP_PROP_4, REDRV_ADDR);
-	phy_data->redrv_lane = XP_GET_BITS(reg, XP_PROP_4, REDRV_LANE);
-	phy_data->redrv_model = XP_GET_BITS(reg, XP_PROP_4, REDRV_MODEL);
+	phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE);
+	phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID);
+	phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS);
+	phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE);
+	phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR);
+
+	phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT);
+	phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF);
+	phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR);
+	phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE);
+	phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL);
 
 	/* Validate the connection requested */
 	if (axgbe_phy_conn_type_mismatch(pdata)) {