[v2,03/18] net/bnxt: fix a typo while parsing link speed

Message ID 20231222215659.64993-4-ajit.khaparde@broadcom.com (mailing list archive)
State Superseded, archived
Delegated to: Ajit Khaparde
Headers
Series bnxt patchset |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Ajit Khaparde Dec. 22, 2023, 9:56 p.m. UTC
  From: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>

While setting forced speed, the speed should have mapped to
macro "HWRM_PORT_PHY_CFG_INPUT_FORCE_xxx" instead of
"HWRM_PORT_PHY_CFG_INPUT_AUTO_xxx". We do not see any issue
as both these macros are defined to the same value.

Fixing it for better convey the intent.

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
 drivers/net/bnxt/bnxt_hwrm.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
  

Patch

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 378be997d3..8f99582819 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -3168,15 +3168,15 @@  static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed,
 	case RTE_ETH_LINK_SPEED_100M_HD:
 		/* FALLTHROUGH */
 		eth_link_speed =
-			HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB;
+			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB;
 		break;
 	case RTE_ETH_LINK_SPEED_1G:
 		eth_link_speed =
-			HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB;
+			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB;
 		break;
 	case RTE_ETH_LINK_SPEED_2_5G:
 		eth_link_speed =
-			HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB;
+			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB;
 		break;
 	case RTE_ETH_LINK_SPEED_10G:
 		eth_link_speed =
@@ -3184,11 +3184,11 @@  static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed,
 		break;
 	case RTE_ETH_LINK_SPEED_20G:
 		eth_link_speed =
-			HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB;
+			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB;
 		break;
 	case RTE_ETH_LINK_SPEED_25G:
 		eth_link_speed =
-			HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB;
+			HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB;
 		break;
 	case RTE_ETH_LINK_SPEED_40G:
 		eth_link_speed =