From patchwork Wed Dec 20 09:32:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhichao Zeng X-Patchwork-Id: 135383 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2059543719; Wed, 20 Dec 2023 10:23:53 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5419A42E84; Wed, 20 Dec 2023 10:23:52 +0100 (CET) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by mails.dpdk.org (Postfix) with ESMTP id E97F842E84 for ; Wed, 20 Dec 2023 10:23:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1703064230; x=1734600230; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5LftSbsUMjoJ+AHkpe/DcaiUOLAy807ChE0A4d+dBTE=; b=c7Iaw/dBUxs7ClTiXdm+YREYS/pzRGvtnPaBsED9uIavABRi8svGG2Dd mdRbPT0Ccpa9VdaFi1imhVtDS51owY/GiurBccm2nzdyxxRqwEMPLt+YH 4y7Ub9PvMaoWP4Mha68+FmNXkCUOk86wn9QxJ7ICCzF/7HtkuC64baHq8 KyHIK4I7Vy5a22xq4etE2o3J61lrZyoJqZtVxU1i4+OqX9socbSMoL8Mw JvM9NPl02ibw+4JJnKTAXtKcuO5F0IDA8m7nOQ80GFC98Bv5vnr/JbLcB Jkjm/JWRuv/l2pQrFzQAsmqe6SpjemmMiNA4eaRVr2WiWpBRZ5XV4Ok5X g==; X-IronPort-AV: E=McAfee;i="6600,9927,10929"; a="3007936" X-IronPort-AV: E=Sophos;i="6.04,291,1695711600"; d="scan'208";a="3007936" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2023 01:23:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10929"; a="769525139" X-IronPort-AV: E=Sophos;i="6.04,291,1695711600"; d="scan'208";a="769525139" Received: from unknown (HELO zhichao-dpdk..) ([10.239.252.103]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2023 01:23:46 -0800 From: Zhichao Zeng To: dev@dpdk.org Cc: qi.z.zhang@intel.com, Zhichao Zeng , Jingjing Wu , Beilei Xing , Bruce Richardson , Konstantin Ananyev Subject: [PATCH v3 2/3] net/iavf: support Tx LLDP on AVX512 Date: Wed, 20 Dec 2023 17:32:38 +0800 Message-Id: <20231220093239.1148174-3-zhichaox.zeng@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231220093239.1148174-1-zhichaox.zeng@intel.com> References: <20231214065857.2142565-1-zhichaox.zeng@intel.com> <20231220093239.1148174-1-zhichaox.zeng@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds an avx512 ctx Tx path that supports context descriptor, filling in the SWTCH_UPLINK bit based on mbuf dynfield IAVF_TX_LLDP_DYNFIELD to support sending LLDP packet. Signed-off-by: Zhichao Zeng --- drivers/net/iavf/iavf_rxtx.c | 5 +++++ drivers/net/iavf/iavf_rxtx.h | 3 +++ drivers/net/iavf/iavf_rxtx_vec_avx512.c | 20 ++++++++++++++++++++ drivers/net/iavf/iavf_rxtx_vec_common.h | 6 ++++++ 4 files changed, 34 insertions(+) diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index 2ecd8637c5..90a2d19c05 100644 --- a/drivers/net/iavf/iavf_rxtx.c +++ b/drivers/net/iavf/iavf_rxtx.c @@ -4053,6 +4053,11 @@ iavf_set_tx_function(struct rte_eth_dev *dev) dev->tx_pkt_prepare = iavf_prep_pkts; PMD_DRV_LOG(DEBUG, "Using AVX512 OFFLOAD Vector Tx (port %d).", dev->data->port_id); + } else if (check_ret == IAVF_VECTOR_CTX_PATH) { + dev->tx_pkt_burst = iavf_xmit_pkts_vec_avx512_ctx; + dev->tx_pkt_prepare = iavf_prep_pkts; + PMD_DRV_LOG(DEBUG, "Using AVX512 CONTEXT Vector Tx (port %d).", + dev->data->port_id); } else { dev->tx_pkt_burst = iavf_xmit_pkts_vec_avx512_ctx_offload; dev->tx_pkt_prepare = iavf_prep_pkts; diff --git a/drivers/net/iavf/iavf_rxtx.h b/drivers/net/iavf/iavf_rxtx.h index f432f9d956..ee52864915 100644 --- a/drivers/net/iavf/iavf_rxtx.h +++ b/drivers/net/iavf/iavf_rxtx.h @@ -66,6 +66,7 @@ #define IAVF_VECTOR_PATH 0 #define IAVF_VECTOR_OFFLOAD_PATH 1 #define IAVF_VECTOR_CTX_OFFLOAD_PATH 2 +#define IAVF_VECTOR_CTX_PATH 3 #define DEFAULT_TX_RS_THRESH 32 #define DEFAULT_TX_FREE_THRESH 32 @@ -752,6 +753,8 @@ uint16_t iavf_xmit_pkts_vec_avx512_offload(void *tx_queue, uint16_t nb_pkts); uint16_t iavf_xmit_pkts_vec_avx512_ctx_offload(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); +uint16_t iavf_xmit_pkts_vec_avx512_ctx(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts); int iavf_txq_vec_setup_avx512(struct iavf_tx_queue *txq); uint8_t iavf_proto_xtr_type_to_rxdid(uint8_t xtr_type); diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/iavf/iavf_rxtx_vec_avx512.c index 7a7df6d258..3ae5e4973c 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c +++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c @@ -2,6 +2,7 @@ * Copyright(c) 2020 Intel Corporation */ +#include "rte_pmd_iavf.h" #include "iavf_rxtx_vec_common.h" #include @@ -2206,6 +2207,10 @@ ctx_vtx1(volatile struct iavf_tx_desc *txdp, struct rte_mbuf *pkt, low_ctx_qw |= (uint64_t)pkt->vlan_tci << IAVF_TXD_CTX_QW0_L2TAG2_PARAM; } } + if (*RTE_MBUF_DYNFIELD(pkt, + iavf_tx_lldp_dynfield_offset, uint8_t *) > 0) + high_ctx_qw |= IAVF_TX_CTX_DESC_SWTCH_UPLINK + << IAVF_TXD_CTX_QW1_CMD_SHIFT; uint64_t high_data_qw = (IAVF_TX_DESC_DTYPE_DATA | ((uint64_t)flags << IAVF_TXD_QW1_CMD_SHIFT) | ((uint64_t)pkt->data_len << IAVF_TXD_QW1_TX_BUF_SZ_SHIFT)); @@ -2258,6 +2263,10 @@ ctx_vtx(volatile struct iavf_tx_desc *txdp, (uint64_t)pkt[1]->vlan_tci << IAVF_TXD_QW1_L2TAG1_SHIFT; } } + if (*RTE_MBUF_DYNFIELD(pkt[1], + iavf_tx_lldp_dynfield_offset, uint8_t *) > 0) + hi_ctx_qw1 |= IAVF_TX_CTX_DESC_SWTCH_UPLINK + << IAVF_TXD_CTX_QW1_CMD_SHIFT; if (pkt[0]->ol_flags & RTE_MBUF_F_TX_VLAN) { if (vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) { @@ -2270,6 +2279,10 @@ ctx_vtx(volatile struct iavf_tx_desc *txdp, (uint64_t)pkt[0]->vlan_tci << IAVF_TXD_QW1_L2TAG1_SHIFT; } } + if (*RTE_MBUF_DYNFIELD(pkt[0], + iavf_tx_lldp_dynfield_offset, uint8_t *) > 0) + hi_ctx_qw0 |= IAVF_TX_CTX_DESC_SWTCH_UPLINK + << IAVF_TXD_CTX_QW1_CMD_SHIFT; if (offload) { iavf_txd_enable_offload(pkt[1], &hi_data_qw1); @@ -2520,3 +2533,10 @@ iavf_xmit_pkts_vec_avx512_ctx_offload(void *tx_queue, struct rte_mbuf **tx_pkts, { return iavf_xmit_pkts_vec_avx512_ctx_cmn(tx_queue, tx_pkts, nb_pkts, true); } + +uint16_t +iavf_xmit_pkts_vec_avx512_ctx(void *tx_queue, struct rte_mbuf **tx_pkts, + uint16_t nb_pkts) +{ + return iavf_xmit_pkts_vec_avx512_ctx_cmn(tx_queue, tx_pkts, nb_pkts, false); +} diff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h index e18cdc3f11..a453d55335 100644 --- a/drivers/net/iavf/iavf_rxtx_vec_common.h +++ b/drivers/net/iavf/iavf_rxtx_vec_common.h @@ -10,6 +10,7 @@ #include "iavf.h" #include "iavf_rxtx.h" +#include "rte_pmd_iavf.h" #ifndef __INTEL_COMPILER #pragma GCC diagnostic ignored "-Wcast-qual" @@ -249,6 +250,11 @@ iavf_tx_vec_queue_default(struct iavf_tx_queue *txq) if (txq->offloads & IAVF_TX_NO_VECTOR_FLAGS) return -1; + if (rte_mbuf_dynfield_lookup(IAVF_TX_LLDP_DYNFIELD, NULL) > 0) { + txq->use_ctx = 1; + return IAVF_VECTOR_CTX_PATH; + } + /** * Vlan tci needs to be inserted via ctx desc, if the vlan_flag is L2TAG2. * Tunneling parameters and other fields need be configured in ctx desc