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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by SN1PEPF0002BA4E.mail.protection.outlook.com (10.167.242.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7091.26 via Frontend Transport; Thu, 14 Dec 2023 03:05:07 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 13 Dec 2023 19:04:55 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Wed, 13 Dec 2023 19:04:52 -0800 From: Suanming Mou To: Dariusz Sosnowski , Viacheslav Ovsiienko , Ori Kam , Matan Azrad CC: , Subject: [PATCH 3/4] net/mlx5: add modify field action ADD fields support Date: Thu, 14 Dec 2023 11:04:26 +0800 Message-ID: <20231214030428.363471-4-suanmingm@nvidia.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231214030428.363471-1-suanmingm@nvidia.com> References: <20231214030428.363471-1-suanmingm@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4E:EE_|DS0PR12MB7827:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c976fc3-65f7-4a7a-9d81-08dbfc517a2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Dec 2023 03:05:07.3880 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c976fc3-65f7-4a7a-9d81-08dbfc517a2b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4E.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7827 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org ADD_FIELD operation allows user to add the src field value to the dest field. Dest field has the sum of src field value and original dst field value. Signed-off-by: Suanming Mou Acked-by: Ori Kam --- drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++++---- drivers/net/mlx5/mlx5_flow_hw.c | 10 +++++++--- 2 files changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 272dbca00f..1c3d557d4a 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -389,6 +389,7 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, uint32_t i = resource->actions_num; struct mlx5_modification_cmd *actions = resource->actions; uint32_t carry_b = 0; + bool to_dest; /* * The item and mask are provided in big-endian format. @@ -397,6 +398,8 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, */ MLX5_ASSERT(item->mask); MLX5_ASSERT(field->size); + to_dest = type == MLX5_MODIFICATION_TYPE_COPY || + type == MLX5_MODIFICATION_TYPE_ADD_FIELD; do { uint32_t size_b; uint32_t off_b; @@ -416,7 +419,7 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, ++field; continue; } - if (type == MLX5_MODIFICATION_TYPE_COPY && field->is_flex) { + if (to_dest && field->is_flex) { off_b = 32 - field->shift + carry_b - field->size * CHAR_BIT; size_b = field->size * CHAR_BIT - carry_b; } else { @@ -433,7 +436,7 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ? 0 : size_b, }; - if (type == MLX5_MODIFICATION_TYPE_COPY) { + if (to_dest) { MLX5_ASSERT(dest); actions[i].dst_field = dest->id; actions[i].dst_offset = @@ -476,11 +479,11 @@ flow_dv_convert_modify_action(struct rte_flow_item *item, } /* Convert entire record to expected big-endian format. */ actions[i].data0 = rte_cpu_to_be_32(actions[i].data0); - if ((type != MLX5_MODIFICATION_TYPE_COPY || + if ((!to_dest || dest->id != (enum mlx5_modification_field)UINT32_MAX) && field->id != (enum mlx5_modification_field)UINT32_MAX) ++i; - if (next_dest && type == MLX5_MODIFICATION_TYPE_COPY) + if (next_dest && to_dest) ++dest; if (next_field) ++field; diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index da873ae2e2..d224979ee8 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -1102,7 +1102,8 @@ flow_hw_should_insert_nop(const struct mlx5_hw_modify_header_action *mhdr, if (last_type == MLX5_MODIFICATION_TYPE_SET || last_type == MLX5_MODIFICATION_TYPE_ADD) should_insert = new_cmd.field == last_cmd.field; - else if (last_type == MLX5_MODIFICATION_TYPE_COPY) + else if (last_type == MLX5_MODIFICATION_TYPE_COPY || + last_type == MLX5_MODIFICATION_TYPE_ADD_FIELD) should_insert = new_cmd.field == last_cmd.dst_field; else if (last_type == MLX5_MODIFICATION_TYPE_NOP) should_insert = false; @@ -1110,11 +1111,13 @@ flow_hw_should_insert_nop(const struct mlx5_hw_modify_header_action *mhdr, MLX5_ASSERT(false); /* Other types are not supported. */ break; case MLX5_MODIFICATION_TYPE_COPY: + case MLX5_MODIFICATION_TYPE_ADD_FIELD: if (last_type == MLX5_MODIFICATION_TYPE_SET || last_type == MLX5_MODIFICATION_TYPE_ADD) should_insert = (new_cmd.field == last_cmd.field || new_cmd.dst_field == last_cmd.field); - else if (last_type == MLX5_MODIFICATION_TYPE_COPY) + else if (last_type == MLX5_MODIFICATION_TYPE_COPY || + last_type == MLX5_MODIFICATION_TYPE_ADD_FIELD) should_insert = (new_cmd.field == last_cmd.dst_field || new_cmd.dst_field == last_cmd.dst_field); else if (last_type == MLX5_MODIFICATION_TYPE_NOP) @@ -1264,7 +1267,8 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev, item.spec = &value; } } else { - type = MLX5_MODIFICATION_TYPE_COPY; + type = conf->operation == RTE_FLOW_MODIFY_SET ? + MLX5_MODIFICATION_TYPE_COPY : MLX5_MODIFICATION_TYPE_ADD_FIELD; /* For COPY fill the destination field (dcopy) without mask. */ mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL, conf->width, dev,