From patchwork Tue Oct 17 05:45:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaoyong He X-Patchwork-Id: 132712 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 881C943186; Tue, 17 Oct 2023 07:49:00 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9D969410F2; Tue, 17 Oct 2023 07:47:24 +0200 (CEST) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2116.outbound.protection.outlook.com [40.107.94.116]) by mails.dpdk.org (Postfix) with ESMTP id 73764410F2 for ; Tue, 17 Oct 2023 07:47:23 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=GBRjvehAQRH+8BaTnPg0DEmGiquJ9MxDVPnO0Ikw51E699NlBFgLafKjQr7fnZg8NWL/UmCH9BlVmPbRQjZ7a/L+ETYBnDBH4sZ9yQRgQrcSooILuEdmiF7rC5CUeK7MB6Go82cgrMJnqNFri2PY8ooQkMSIuyPmFNaWF6DTEfOAeQwVMcUG9ymXWnl8BaOWOQPYR1AOfQd3zCn367UgxD6frDaeaR0hhBL2PqdCOnfFoeZ7TTFoiAcXrGv8lSLyJSyKtKVXGz/qojsjJkgXyJkCbjHFXWiPVDkMQaDNm3C35yPTtrrkOJUXWOtj1G6rSjYxVViFiVJ3nXDDA4SbVg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CRjIkFOAgtqQO6MucvhuRNntT4IojwKrYXbnkxEmJj4=; b=Y5N0fVDkAYLLWh8ypBzViIvfYbD/1saTHzaxFEMgz8YjT9yg3ePh7UqdBjOHnE8HZ1CknztiTdbcRfGAjTYVumCUg9Y0F4yXVJvhzb3nLunI0FTkGH4bQGuLzNJI6CGsgltkTScfhKutpOYnOdauYxkrQmvTW5r12N+zu6dF7fYADGcFwEVu10/n/gtvX9l3A4Q2nlid5sGYenvh2+NRMki8kNry6GgoMKD9f5NkInz+Iho4e4zJyRFsXXyDgwDfZlkoKjzO7UqHRzSlCctSc3rNUSj/GbVxdCccvIDfIrCUYe3AYMqULaZFI04wqiGktoCpeu7s03jMSAsAGoW2cQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=corigine.com; dmarc=pass action=none header.from=corigine.com; dkim=pass header.d=corigine.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=corigine.onmicrosoft.com; s=selector2-corigine-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CRjIkFOAgtqQO6MucvhuRNntT4IojwKrYXbnkxEmJj4=; b=Otwujda9DgSZu34t1SFfZJelpCQ8AH5584Uhp95yAgrft5hB5VtC/aukT7uU6s2oTcaQXo4/WblTdoi7Q2X1xWYO3/MfsS/gje+jfXaiwkra64uU0aHwEAZ2N5M3ZRlF035K7AQypWZkpOkRcvKipWbD9UiABYK331ZShLYaKCs= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=corigine.com; Received: from PH0PR13MB5568.namprd13.prod.outlook.com (2603:10b6:510:12b::16) by SJ0PR13MB5272.namprd13.prod.outlook.com (2603:10b6:a03:3e3::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6863.46; Tue, 17 Oct 2023 05:47:19 +0000 Received: from PH0PR13MB5568.namprd13.prod.outlook.com ([fe80::b070:92e1:931e:fee7]) by PH0PR13MB5568.namprd13.prod.outlook.com ([fe80::b070:92e1:931e:fee7%4]) with mapi id 15.20.6863.047; Tue, 17 Oct 2023 05:47:19 +0000 From: Chaoyong He To: dev@dpdk.org Cc: oss-drivers@corigine.com, Chaoyong He , Shujing Dong , Long Wu , Peng Zhang Subject: [PATCH 22/25] drivers: add the datapath update logic Date: Tue, 17 Oct 2023 13:45:42 +0800 Message-Id: <20231017054545.1692509-23-chaoyong.he@corigine.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20231017054545.1692509-1-chaoyong.he@corigine.com> References: <20231017054545.1692509-1-chaoyong.he@corigine.com> X-ClientProxiedBy: PH7PR17CA0069.namprd17.prod.outlook.com (2603:10b6:510:325::29) To PH0PR13MB5568.namprd13.prod.outlook.com (2603:10b6:510:12b::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH0PR13MB5568:EE_|SJ0PR13MB5272:EE_ X-MS-Office365-Filtering-Correlation-Id: 17daa154-f500-4578-fa4e-08dbced48552 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3OAyWuPGafkijePGeJQJJaoLqA7/Idl6NA+iPz6bmbH8Bmiql1lKE7YjegErSwiZGjWMmQMHLfzK4CeLnlPkzvaFpT+FtaUOHDZ5W9iC6jjnBoyD1BBbiaTahM/Z37EvSavWrtZZ7Ytoy0/1oFqPt8UVuU0JbQGwlCMw10IJYUvBtGpyEnY2mI8wtRkh34bQ6LtvM773HQz8EDuk6fnn/yDuNH7dY7gMeBNzdred463N5LfFP5vQONc7RgkMtTB/mcNO479A8dcTHWXUAP6QyrQWynKmaZDxQB2/BPB/o/8KsRQgxNHxcZNyJIUloAkC/jfohI2hdWnkv7eQD3519lSD5UnxZEyCS/Fn0WAwAsXMEfD9YPTmjeeLuLfuIyG8OA4R9f+xeYNKgSdvGqmXcU1aYtYUEQ1RCqjS7gjoAakxWezd2Z3O9+rrg2LleVMalZGplR9DjjE/u2YrgoPdNcpxWiVyof4akGbQ/B8EOx3E+Q2/V605l6zN8E0Zz4DL4KYPJV+hTYEewPXvnZwSUUy3n/kZUwRoDjBLkU1FKqCvsGWwoIsCV8FPLfHt7z3AGOxM8qmOJSi7uG3aBsiat+E+DOYUVJ0U0kryCKrmm097fEi1+VFOZHObxelG4hWTxsqu2ONauB2OeRkz4x03WtjLAm4/StHyxPKRFLmCUtk= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:PH0PR13MB5568.namprd13.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(366004)(136003)(376002)(346002)(396003)(39830400003)(230922051799003)(451199024)(64100799003)(1800799009)(186009)(38350700005)(6916009)(66476007)(6666004)(66556008)(66946007)(6486002)(86362001)(54906003)(2616005)(83380400001)(478600001)(6512007)(38100700002)(316002)(1076003)(52116002)(26005)(107886003)(5660300002)(30864003)(6506007)(2906002)(4326008)(15650500001)(8676002)(36756003)(44832011)(41300700001)(8936002); DIR:OUT; SFP:1102; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NRtxs/kAcAK9j1FeY32NLIYxPO9Nwb2/1pr54we3UV9FwrqrQlXxp/AVJDyiCPRoS+//x+q/CyMIFdaNnieIokVbVe306B3VcRAhoWy5cU4M7M628zfZFhwyufbJPLOTvHyBspQ+04twNUptxK1sh436T9tVuaxcOriMeybB8nRDr/OaJ4m+udgvohoLp4w2c8YyDu7zQiqMGpyC/bxsYoJx4A9Ts4nfs9NAHEfenKWZL3UPzcaEf/luHYlR6qHnFwwMtsPStKj5QBt1SNch3qACFy21dXENFJUDNJ7Zy5EaweFtd6YDd1N6oFlespNedg5n+YiVXu5nrhBhUnbHh2mInwPNu1wZKAZoWKufI0z0p28kjLEY6Pwu2XZFjk/R6PRAUXpiyoV6sbkEFPJM5FRo/ywQxcirP14KvWqv5diS136XtOuCtv/WV7jOY1kJ2dSOfDvmrE9DBv3GzrOomt+JYbT/sthTMIoaJ95BVZ37/ZJl0tY8CT5uMSh6JE+yEh9W+jK81+GYP5Y56pjT+ji8g2phg/gYBWFAxsmy4NWg65yDY/6T9AL25GDAwJylM61hCgT1r6QXvazLkVQ6kdGqGk/uzO7noULzzV4n7NqIKBkMgrEOdXZlx5935fH9tBjF5JyizQVzNlSpWWfq8F7bT+Icp9ggqVYtskKQzARswTAIoTfLBlrdFIsKcMbrVWo2xOwu13MyC8821qpKcybj9JH9iL3CHg5Er3qTJ60vL/2IaIZchxcVywpYtUn+jmrnRyBteeTooSlMEbSqdE5FfGO1VC8R9bZTSi9xmhqk/N+LdPetj3umoXOKn8UfvGWv3oWoGbvK3ep67IHYqskiBNEc1UPTKXh7AlS2hN1xmHs5v0EuAhlhJj9yUnUPIGBaHhF9Z0apMIFLeTfTbnZY9Mvva85MeQ4c5mq5W1uF8EcMq9j40Qs6dKqoeOTESTQCetjiGFuuRMgRDxLCXCE8TPCetBarEmRZUoaErzsS4opz5iCFaHXqKZ45usreOoAms6iRXWOft6hpWATyJbqqDnZ9Cz/N4ZE1sC6KLDWu91ZHdbC3fFHP4Pl+zVWeijUaqEN3d7ix8mS9HifrxQMR1of2qAxEHgnvIhj+U84OjNakwGI1xNeMorDVpNPkDbKyrgCZ1VsceK45tBmkNkpE/vX+RlSls/INF4oIJbGIeQ16NFbYO4LXobivvEoNhEhbFvPjI9STeWMBsWN61fK2HfpJp3CHxKnSUhgQaQp2XqMGss8/nVh95T6SuXBhu0B38Ve6IkfuurFgSPjVPl8ccntqnsF0EWWZHXKR6FAFM2pQxrEdP6R8N7Z0COM3vplOv6fRcHE60cZi8yWjrX9RZJms9TDUaqTU52zZc9zmazyvvzPKcp+jp1Ng7bMo0SjtWXQk1qxT4bvwVa6kjm9+yRPCSfdNvuccAqPTGhEyXDYRAnfW8qcQKB32O8GW251KsKBGw7PY2EeO1OZyXxHhkMnu8hUXAfiCnyPmJf1frJqk9+U64g1sSZaGFVYTdi3+U0LFQDlVBcXtbU/PwW3qp3Ihp0TaRQbLCxF1NqWRJs7lJHhNPJjowmCbZoWc6XudgG340DznwyAclYNBZQ== X-OriginatorOrg: corigine.com X-MS-Exchange-CrossTenant-Network-Message-Id: 17daa154-f500-4578-fa4e-08dbced48552 X-MS-Exchange-CrossTenant-AuthSource: PH0PR13MB5568.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Oct 2023 05:47:19.1407 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: fe128f2c-073b-4c20-818e-7246a585940c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zYf04xkJ4z7+VMCgPiHppgJD9gdRoTd14Ka2Qr9/I/WHobXJE2YCHPzocibXnw1Y6j3HshJw+dmHULZDirS7+RssjPKqcL54Uh5rR8JWqMw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR13MB5272 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add the vDPA datapath update logic. Signed-off-by: Chaoyong He Signed-off-by: Shujing Dong Reviewed-by: Long Wu Reviewed-by: Peng Zhang --- drivers/common/nfp/nfp_common_ctrl.h | 1 + drivers/vdpa/nfp/nfp_vdpa.c | 315 +++++++++++++++++++++++++++ drivers/vdpa/nfp/nfp_vdpa_core.c | 78 +++++++ drivers/vdpa/nfp/nfp_vdpa_core.h | 15 ++ 4 files changed, 409 insertions(+) diff --git a/drivers/common/nfp/nfp_common_ctrl.h b/drivers/common/nfp/nfp_common_ctrl.h index 3c8cd916cf..f92ce50fc0 100644 --- a/drivers/common/nfp/nfp_common_ctrl.h +++ b/drivers/common/nfp/nfp_common_ctrl.h @@ -238,6 +238,7 @@ struct nfp_net_fw_ver { #define NFP_NET_CFG_CTRL_IPSEC (0x1 << 1) /**< IPsec offload */ #define NFP_NET_CFG_CTRL_IPSEC_SM_LOOKUP (0x1 << 3) /**< SA short match lookup */ #define NFP_NET_CFG_CTRL_IPSEC_LM_LOOKUP (0x1 << 4) /**< SA long match lookup */ +#define NFP_NET_CFG_CTRL_IN_ORDER (0x1 << 11) /**< Virtio in-order flag */ #define NFP_NET_CFG_CAP_WORD1 0x00a4 diff --git a/drivers/vdpa/nfp/nfp_vdpa.c b/drivers/vdpa/nfp/nfp_vdpa.c index 00d8f7e007..465ee4841d 100644 --- a/drivers/vdpa/nfp/nfp_vdpa.c +++ b/drivers/vdpa/nfp/nfp_vdpa.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -15,6 +16,9 @@ #define NFP_VDPA_DRIVER_NAME nfp_vdpa +#define MSIX_IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + \ + sizeof(int) * (NFP_VDPA_MAX_QUEUES * 2 + 1)) + struct nfp_vdpa_dev { struct rte_pci_device *pci_dev; struct rte_vdpa_device *vdev; @@ -25,7 +29,15 @@ struct nfp_vdpa_dev { int vfio_dev_fd; int iommu_group; + int vid; uint16_t max_queues; + uint32_t started; + uint32_t dev_attached; + uint32_t running; + rte_spinlock_t lock; + + /** Eventfd for used ring interrupt */ + int intr_fd[NFP_VDPA_MAX_QUEUES * 2]; }; struct nfp_vdpa_dev_node { @@ -112,6 +124,302 @@ nfp_vdpa_vfio_teardown(struct nfp_vdpa_dev *device) rte_vfio_container_destroy(device->vfio_container_fd); } +static int +nfp_vdpa_dma_do_unmap(struct rte_vhost_memory *mem, + uint32_t times, + int vfio_container_fd) +{ + uint32_t i; + int ret = 0; + struct rte_vhost_mem_region *region; + + for (i = 0; i < times; i++) { + region = &mem->regions[i]; + + ret = rte_vfio_container_dma_unmap(vfio_container_fd, + region->host_user_addr, region->guest_phys_addr, + region->size); + if (ret < 0) { + /* Here should not return, even error happened. */ + DRV_VDPA_LOG(ERR, "DMA unmap failed. Times: %u", i); + } + } + + return ret; +} + +static int +nfp_vdpa_dma_do_map(struct rte_vhost_memory *mem, + uint32_t times, + int vfio_container_fd) +{ + int ret; + uint32_t i; + struct rte_vhost_mem_region *region; + + for (i = 0; i < times; i++) { + region = &mem->regions[i]; + + ret = rte_vfio_container_dma_map(vfio_container_fd, + region->host_user_addr, region->guest_phys_addr, + region->size); + if (ret < 0) { + DRV_VDPA_LOG(ERR, "DMA map failed."); + nfp_vdpa_dma_do_unmap(mem, i, vfio_container_fd); + return ret; + } + } + + return 0; +} + +static int +nfp_vdpa_dma_map(struct nfp_vdpa_dev *device, + bool do_map) +{ + int ret; + int vfio_container_fd; + struct rte_vhost_memory *mem = NULL; + + ret = rte_vhost_get_mem_table(device->vid, &mem); + if (ret < 0) { + DRV_VDPA_LOG(ERR, "Failed to get memory layout."); + return ret; + } + + vfio_container_fd = device->vfio_container_fd; + DRV_VDPA_LOG(DEBUG, "vfio_container_fd %d", vfio_container_fd); + + if (do_map) + ret = nfp_vdpa_dma_do_map(mem, mem->nregions, vfio_container_fd); + else + ret = nfp_vdpa_dma_do_unmap(mem, mem->nregions, vfio_container_fd); + + free(mem); + + return ret; +} + +static uint64_t +nfp_vdpa_qva_to_gpa(int vid, + uint64_t qva) +{ + int ret; + uint32_t i; + uint64_t gpa = 0; + struct rte_vhost_memory *mem = NULL; + struct rte_vhost_mem_region *region; + + ret = rte_vhost_get_mem_table(vid, &mem); + if (ret < 0) { + DRV_VDPA_LOG(ERR, "Failed to get memory layout."); + return gpa; + } + + for (i = 0; i < mem->nregions; i++) { + region = &mem->regions[i]; + + if (qva >= region->host_user_addr && + qva < region->host_user_addr + region->size) { + gpa = qva - region->host_user_addr + region->guest_phys_addr; + break; + } + } + + free(mem); + + return gpa; +} + +static int +nfp_vdpa_start(struct nfp_vdpa_dev *device) +{ + int ret; + int vid; + uint16_t i; + uint64_t gpa; + struct rte_vhost_vring vring; + struct nfp_vdpa_hw *vdpa_hw = &device->hw; + + vid = device->vid; + vdpa_hw->nr_vring = rte_vhost_get_vring_num(vid); + + ret = rte_vhost_get_negotiated_features(vid, &vdpa_hw->req_features); + if (ret != 0) + return ret; + + for (i = 0; i < vdpa_hw->nr_vring; i++) { + ret = rte_vhost_get_vhost_vring(vid, i, &vring); + if (ret != 0) + return ret; + + gpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.desc); + if (gpa == 0) { + DRV_VDPA_LOG(ERR, "Fail to get GPA for descriptor ring."); + return -1; + } + + vdpa_hw->vring[i].desc = gpa; + + gpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.avail); + if (gpa == 0) { + DRV_VDPA_LOG(ERR, "Fail to get GPA for available ring."); + return -1; + } + + vdpa_hw->vring[i].avail = gpa; + + gpa = nfp_vdpa_qva_to_gpa(vid, (uint64_t)(uintptr_t)vring.used); + if (gpa == 0) { + DRV_VDPA_LOG(ERR, "Fail to get GPA for used ring."); + return -1; + } + + vdpa_hw->vring[i].used = gpa; + + vdpa_hw->vring[i].size = vring.size; + + ret = rte_vhost_get_vring_base(vid, i, + &vdpa_hw->vring[i].last_avail_idx, + &vdpa_hw->vring[i].last_used_idx); + if (ret != 0) + return ret; + } + + return nfp_vdpa_hw_start(&device->hw, vid); +} + +static void +nfp_vdpa_stop(struct nfp_vdpa_dev *device) +{ + int vid; + uint32_t i; + struct nfp_vdpa_hw *vdpa_hw = &device->hw; + + nfp_vdpa_hw_stop(vdpa_hw); + + vid = device->vid; + for (i = 0; i < vdpa_hw->nr_vring; i++) + rte_vhost_set_vring_base(vid, i, + vdpa_hw->vring[i].last_avail_idx, + vdpa_hw->vring[i].last_used_idx); +} + +static int +nfp_vdpa_enable_vfio_intr(struct nfp_vdpa_dev *device) +{ + int ret; + uint16_t i; + int *fd_ptr; + uint16_t nr_vring; + struct vfio_irq_set *irq_set; + struct rte_vhost_vring vring; + char irq_set_buf[MSIX_IRQ_SET_BUF_LEN]; + + nr_vring = rte_vhost_get_vring_num(device->vid); + + irq_set = (struct vfio_irq_set *)irq_set_buf; + irq_set->argsz = sizeof(irq_set_buf); + irq_set->count = nr_vring + 1; + irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER; + irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX; + irq_set->start = 0; + + fd_ptr = (int *)&irq_set->data; + fd_ptr[RTE_INTR_VEC_ZERO_OFFSET] = rte_intr_fd_get(device->pci_dev->intr_handle); + + for (i = 0; i < nr_vring; i++) + device->intr_fd[i] = -1; + + for (i = 0; i < nr_vring; i++) { + rte_vhost_get_vhost_vring(device->vid, i, &vring); + fd_ptr[RTE_INTR_VEC_RXTX_OFFSET + i] = vring.callfd; + } + + ret = ioctl(device->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set); + if (ret != 0) { + DRV_VDPA_LOG(ERR, "Error enabling MSI-X interrupts."); + return -EIO; + } + + return 0; +} + +static int +nfp_vdpa_disable_vfio_intr(struct nfp_vdpa_dev *device) +{ + int ret; + struct vfio_irq_set *irq_set; + char irq_set_buf[MSIX_IRQ_SET_BUF_LEN]; + + irq_set = (struct vfio_irq_set *)irq_set_buf; + irq_set->argsz = sizeof(irq_set_buf); + irq_set->count = 0; + irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER; + irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX; + irq_set->start = 0; + + ret = ioctl(device->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set); + if (ret != 0) { + DRV_VDPA_LOG(ERR, "Error disabling MSI-X interrupts."); + return -EIO; + } + + return 0; +} + +static int +update_datapath(struct nfp_vdpa_dev *device) +{ + int ret; + + rte_spinlock_lock(&device->lock); + + if ((__atomic_load_n(&device->running, __ATOMIC_RELAXED) == 0) && + (__atomic_load_n(&device->started, __ATOMIC_RELAXED) != 0) && + (__atomic_load_n(&device->dev_attached, __ATOMIC_RELAXED) != 0)) { + ret = nfp_vdpa_dma_map(device, true); + if (ret != 0) + goto unlock_exit; + + ret = nfp_vdpa_enable_vfio_intr(device); + if (ret != 0) + goto dma_map_rollback; + + ret = nfp_vdpa_start(device); + if (ret != 0) + goto disable_vfio_intr; + + __atomic_store_n(&device->running, 1, __ATOMIC_RELAXED); + } else if ((__atomic_load_n(&device->running, __ATOMIC_RELAXED) != 0) && + ((__atomic_load_n(&device->started, __ATOMIC_RELAXED) != 0) || + (__atomic_load_n(&device->dev_attached, __ATOMIC_RELAXED) != 0))) { + + nfp_vdpa_stop(device); + + ret = nfp_vdpa_disable_vfio_intr(device); + if (ret != 0) + goto unlock_exit; + + ret = nfp_vdpa_dma_map(device, false); + if (ret != 0) + goto unlock_exit; + + __atomic_store_n(&device->running, 0, __ATOMIC_RELAXED); + } + + rte_spinlock_unlock(&device->lock); + return 0; + +disable_vfio_intr: + nfp_vdpa_disable_vfio_intr(device); +dma_map_rollback: + nfp_vdpa_dma_map(device, false); +unlock_exit: + rte_spinlock_unlock(&device->lock); + return ret; +} + struct rte_vdpa_dev_ops nfp_vdpa_ops = { }; @@ -156,6 +464,10 @@ nfp_vdpa_pci_probe(struct rte_pci_device *pci_dev) TAILQ_INSERT_TAIL(&vdpa_dev_list, node, next); pthread_mutex_unlock(&vdpa_list_lock); + rte_spinlock_init(&device->lock); + __atomic_store_n(&device->started, 1, __ATOMIC_RELAXED); + update_datapath(device); + return 0; vfio_teardown: @@ -185,6 +497,9 @@ nfp_vdpa_pci_remove(struct rte_pci_device *pci_dev) device = node->device; + __atomic_store_n(&device->started, 0, __ATOMIC_RELAXED); + update_datapath(device); + pthread_mutex_lock(&vdpa_list_lock); TAILQ_REMOVE(&vdpa_dev_list, node, next); pthread_mutex_unlock(&vdpa_list_lock); diff --git a/drivers/vdpa/nfp/nfp_vdpa_core.c b/drivers/vdpa/nfp/nfp_vdpa_core.c index a7e15fa88a..db9b8462b4 100644 --- a/drivers/vdpa/nfp/nfp_vdpa_core.c +++ b/drivers/vdpa/nfp/nfp_vdpa_core.c @@ -5,6 +5,7 @@ #include "nfp_vdpa_core.h" +#include #include #include "nfp_vdpa_log.h" @@ -52,3 +53,80 @@ nfp_vdpa_hw_init(struct nfp_vdpa_hw *vdpa_hw, return 0; } + +static uint32_t +nfp_vdpa_check_offloads(void) +{ + return NFP_NET_CFG_CTRL_SCATTER | + NFP_NET_CFG_CTRL_IN_ORDER; +} + +int +nfp_vdpa_hw_start(struct nfp_vdpa_hw *vdpa_hw, + int vid) +{ + int ret; + uint32_t update; + uint32_t new_ctrl; + struct timespec wait_tst; + struct nfp_hw *hw = &vdpa_hw->super; + uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; + + nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(0), vdpa_hw->vring[1].desc); + nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(0), rte_log2_u32(vdpa_hw->vring[1].size)); + nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(1), vdpa_hw->vring[1].avail); + nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(2), vdpa_hw->vring[1].used); + + nn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(0), vdpa_hw->vring[0].desc); + nn_cfg_writeb(hw, NFP_NET_CFG_RXR_SZ(0), rte_log2_u32(vdpa_hw->vring[0].size)); + nn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(1), vdpa_hw->vring[0].avail); + nn_cfg_writeq(hw, NFP_NET_CFG_RXR_ADDR(2), vdpa_hw->vring[0].used); + + rte_wmb(); + + nfp_disable_queues(hw); + nfp_enable_queues(hw, NFP_VDPA_MAX_QUEUES, NFP_VDPA_MAX_QUEUES); + + new_ctrl = nfp_vdpa_check_offloads(); + + nn_cfg_writel(hw, NFP_NET_CFG_MTU, 9216); + nn_cfg_writel(hw, NFP_NET_CFG_FLBUFSZ, 10240); + + /* TODO: Temporary set MAC to fixed value fe:1b:ac:05:a5:22 */ + mac_addr[0] = 0xfe; + mac_addr[1] = 0x1b; + mac_addr[2] = 0xac; + mac_addr[3] = 0x05; + mac_addr[4] = 0xa5; + mac_addr[5] = (0x22 + vid); + + /* Writing new MAC to the specific port BAR address */ + nfp_write_mac(hw, (uint8_t *)mac_addr); + + /* Enable device */ + new_ctrl |= NFP_NET_CFG_CTRL_ENABLE; + + /* Signal the NIC about the change */ + update = NFP_NET_CFG_UPDATE_MACADDR | + NFP_NET_CFG_UPDATE_GEN | + NFP_NET_CFG_UPDATE_RING; + + ret = nfp_reconfig(hw, new_ctrl, update); + if (ret < 0) + return -EIO; + + hw->ctrl = new_ctrl; + + DRV_CORE_LOG(DEBUG, "Enabling the device, sleep 1 seconds..."); + wait_tst.tv_sec = 1; + wait_tst.tv_nsec = 0; + nanosleep(&wait_tst, 0); + + return 0; +} + +void +nfp_vdpa_hw_stop(struct nfp_vdpa_hw *vdpa_hw) +{ + nfp_disable_queues(&vdpa_hw->super); +} diff --git a/drivers/vdpa/nfp/nfp_vdpa_core.h b/drivers/vdpa/nfp/nfp_vdpa_core.h index c9403e0ea4..a88de768dd 100644 --- a/drivers/vdpa/nfp/nfp_vdpa_core.h +++ b/drivers/vdpa/nfp/nfp_vdpa_core.h @@ -15,6 +15,15 @@ #define NFP_VDPA_NOTIFY_ADDR_BASE 0x4000 #define NFP_VDPA_NOTIFY_ADDR_INTERVAL 0x1000 +struct nfp_vdpa_vring { + uint64_t desc; + uint64_t avail; + uint64_t used; + uint16_t size; + uint16_t last_avail_idx; + uint16_t last_used_idx; +}; + struct nfp_vdpa_hw { struct nfp_hw super; @@ -22,11 +31,17 @@ struct nfp_vdpa_hw { uint64_t req_features; uint8_t *notify_addr[NFP_VDPA_MAX_QUEUES * 2]; + struct nfp_vdpa_vring vring[NFP_VDPA_MAX_QUEUES * 2]; uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; uint8_t notify_region; + uint8_t nr_vring; }; int nfp_vdpa_hw_init(struct nfp_vdpa_hw *vdpa_hw, struct rte_pci_device *dev); +int nfp_vdpa_hw_start(struct nfp_vdpa_hw *vdpa_hw, int vid); + +void nfp_vdpa_hw_stop(struct nfp_vdpa_hw *vdpa_hw); + #endif /* __NFP_VDPA_CORE_H__ */