diff mbox series

net/cnxk: fix TAG read data offset

Message ID 20230928105058.5715-1-pbhagavatula@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Jerin Jacob
Headers
Series net/cnxk: fix TAG read data offset |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
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ci/intel-Functional success Functional PASS
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ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-compile-amd64-testing success Testing PASS
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ci/iol-unit-arm64-testing success Testing PASS
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Commit Message

Pavan Nikhilesh Bhagavatula Sept. 28, 2023, 10:50 a.m. UTC 
  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

The workslot structure elements were shuffled around to maintain
uniformity between CN9K and CN10K which moved the TAG data offset
from first dword to third dword.

Fixes: 182767f70ef2 ("event/cnxk: add event port flow context APIs")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
Please squash to 182767f70ef2

 drivers/net/cnxk/cn10k_tx.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

--
2.41.0

Comments

Jerin Jacob Oct. 4, 2023, 3:48 p.m. UTC | #1 
On Thu, Sep 28, 2023 at 6:16 PM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> The workslot structure elements were shuffled around to maintain
> uniformity between CN9K and CN10K which moved the TAG data offset
> from first dword to third dword.
>
> Fixes: 182767f70ef2 ("event/cnxk: add event port flow context APIs")
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
> ---
> Please squash to 182767f70ef2

Squashed this patch and pushed to next-event tree.
diff mbox series

Patch

diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
index 298d243aac..bb442fc6b5 100644
--- a/drivers/net/cnxk/cn10k_tx.h
+++ b/drivers/net/cnxk/cn10k_tx.h
@@ -1374,8 +1374,8 @@  cn10k_nix_xmit_pkts(void *tx_queue, uint64_t *ws, struct rte_mbuf **tx_pkts,
 			lnum++;
 	}

-	if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
-		ws[1] = roc_sso_hws_head_wait(ws[0]);
+	if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+		ws[3] = roc_sso_hws_head_wait(ws[0]);

 	left -= burst;
 	tx_pkts += burst;
@@ -1531,8 +1531,8 @@  cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws,
 		}
 	}

-	if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
-		ws[1] = roc_sso_hws_head_wait(ws[0]);
+	if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+		ws[3] = roc_sso_hws_head_wait(ws[0]);

 	left -= burst;
 	tx_pkts += burst;
@@ -3122,8 +3122,8 @@  cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws,
 	if (flags & (NIX_TX_MULTI_SEG_F | NIX_TX_OFFLOAD_SECURITY_F))
 		wd.data[0] >>= 16;

-	if ((flags & NIX_TX_VWQE_F) && !(ws[1] & BIT_ULL(35)))
-		ws[1] = roc_sso_hws_head_wait(ws[0]);
+	if ((flags & NIX_TX_VWQE_F) && !(ws[3] & BIT_ULL(35)))
+		ws[3] = roc_sso_hws_head_wait(ws[0]);

 	left -= burst;