From patchwork Wed Sep 20 06:22:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simei Su X-Patchwork-Id: 131660 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 13620425E9; Wed, 20 Sep 2023 08:22:37 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 969DE40A80; Wed, 20 Sep 2023 08:22:23 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by mails.dpdk.org (Postfix) with ESMTP id EB14640A72 for ; Wed, 20 Sep 2023 08:22:21 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695190942; x=1726726942; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cLjQvst4+qT/DxgfTinZr75zvvJSxEBHlEtzfG4KlBk=; b=beBJv5LA8uSHJcfZk0/7ITdXPFReapOoezdr59YY8ktjCgejSSKyGuRc BhJy0u7cwMThyztFbtxVvhZZFe0mo6NARAky2VUV66UYYMXnO3z8rZvqv aw2LKQImjaHq70RQZWGbbFIeydyIL9wnz5s3RhohN3g+cIwb0MRWjJcFZ fYIMO58YlIgZxleriGvfc0jfa5Rd88pF+P9wGqYdQwDt36OhtTK1UEoVE sGXmwxYfrnGB+OL1OqXtRO5DJ7wQ2I+yZibsqhkBpub98mPUgKE6edLBx PomMzZ+LHjplmys6fWki2AUcjiBs+bLjYWQOwi2QlnxvUu43g5czbf5d4 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="466453235" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="466453235" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Sep 2023 23:22:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10838"; a="920154573" X-IronPort-AV: E=Sophos;i="6.02,161,1688454000"; d="scan'208";a="920154573" Received: from dpdk-simei-icelake.sh.intel.com ([10.67.110.167]) by orsmga005.jf.intel.com with ESMTP; 19 Sep 2023 23:22:19 -0700 From: Simei Su To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, wenjun1.wu@intel.com, mingxia.liu@intel.com, wenjing.qiao@intel.com, Simei Su , Josh Hay Subject: [PATCH v5 03/11] common/idpf/base: add miss completion capabilities Date: Wed, 20 Sep 2023 14:22:28 +0800 Message-Id: <20230920062236.375308-4-simei.su@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230920062236.375308-1-simei.su@intel.com> References: <20230918021130.192982-1-simei.su@intel.com> <20230920062236.375308-1-simei.su@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add miss completion tag in other capability flags to indicate support for detecting a miss completion based on the upper bit of the completion tag. Signed-off-by: Josh Hay Signed-off-by: Simei Su Acked-by: Beilei Xing --- .mailmap | 1 + drivers/common/idpf/base/virtchnl2.h | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/.mailmap b/.mailmap index 3dfdd81797..91d8cca78f 100644 --- a/.mailmap +++ b/.mailmap @@ -1641,3 +1641,4 @@ Zorik Machulsky Zyta Szpak Jayaprakash Shanmugam Zhenning Xiao +Josh Hay diff --git a/drivers/common/idpf/base/virtchnl2.h b/drivers/common/idpf/base/virtchnl2.h index cd47444835..c49e4b943c 100644 --- a/drivers/common/idpf/base/virtchnl2.h +++ b/drivers/common/idpf/base/virtchnl2.h @@ -231,6 +231,10 @@ #define VIRTCHNL2_CAP_RX_FLEX_DESC BIT(17) #define VIRTCHNL2_CAP_PTYPE BIT(18) #define VIRTCHNL2_CAP_LOOPBACK BIT(19) +/* Enable miss completion types plus ability to detect a miss completion if a + * reserved bit is set in a standared completion's tag. + */ +#define VIRTCHNL2_CAP_MISS_COMPL_TAG BIT(20) /* this must be the last capability */ #define VIRTCHNL2_CAP_OEM BIT(63)