@@ -503,7 +503,8 @@ nfp_flower_init_ctrl_vnic(struct nfp_net_hw *hw)
* resizing in later calls to the queue setup function.
*/
tz = rte_eth_dma_zone_reserve(eth_dev, "ctrl_rx_ring", i,
- sizeof(struct nfp_net_rx_desc) * NFP_NET_MAX_RX_DESC,
+ sizeof(struct nfp_net_rx_desc) *
+ pf_dev->dev_info->max_qc_size,
NFP_MEMZONE_ALIGN, numa_node);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating rx dma");
@@ -558,7 +559,8 @@ nfp_flower_init_ctrl_vnic(struct nfp_net_hw *hw)
* resizing in later calls to the queue setup function.
*/
tz = rte_eth_dma_zone_reserve(eth_dev, "ctrl_tx_ring", i,
- sizeof(struct nfp_net_nfd3_tx_desc) * NFP_NET_MAX_TX_DESC,
+ sizeof(struct nfp_net_nfd3_tx_desc) *
+ pf_dev->dev_info->max_qc_size,
NFP_MEMZONE_ALIGN, numa_node);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating tx dma");
@@ -67,7 +67,8 @@ nfp_pf_repr_rx_queue_setup(struct rte_eth_dev *dev,
* resizing in later calls to the queue setup function.
*/
tz = rte_eth_dma_zone_reserve(dev, "rx_ring", queue_idx,
- sizeof(struct nfp_net_rx_desc) * NFP_NET_MAX_RX_DESC,
+ sizeof(struct nfp_net_rx_desc) *
+ hw->pf_dev->dev_info->max_qc_size,
NFP_MEMZONE_ALIGN, socket_id);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating rx dma");
@@ -140,7 +141,8 @@ nfp_pf_repr_tx_queue_setup(struct rte_eth_dev *dev,
* resizing in later calls to the queue setup function.
*/
tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_nfd3_tx_desc) * NFP_NET_MAX_TX_DESC,
+ sizeof(struct nfp_net_nfd3_tx_desc) *
+ hw->pf_dev->dev_info->max_qc_size,
NFP_MEMZONE_ALIGN, socket_id);
if (tz == NULL) {
PMD_DRV_LOG(ERR, "Error allocating tx dma");
@@ -21,6 +21,7 @@ sources = files(
'nfpcore/nfp_rtsym.c',
'nfpcore/nfp_nsp_cmds.c',
'nfpcore/nfp_crc.c',
+ 'nfpcore/nfp_dev.c',
'nfpcore/nfp_mutex.c',
'nfpcore/nfp_nsp_eth.c',
'nfpcore/nfp_hwinfo.c',
@@ -262,7 +262,6 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev,
unsigned int socket_id,
const struct rte_eth_txconf *tx_conf)
{
- int ret;
size_t size;
uint32_t tx_desc_sz;
uint16_t min_tx_desc;
@@ -276,9 +275,7 @@ nfp_net_nfd3_tx_queue_setup(struct rte_eth_dev *dev,
PMD_INIT_FUNC_TRACE();
- ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
- if (ret != 0)
- return ret;
+ nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
/* Validating number of descriptors */
tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfd3_tx_desc);
@@ -357,7 +357,6 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
unsigned int socket_id,
const struct rte_eth_txconf *tx_conf)
{
- int ret;
size_t size;
uint32_t tx_desc_sz;
uint16_t min_tx_desc;
@@ -371,9 +370,7 @@ nfp_net_nfdk_tx_queue_setup(struct rte_eth_dev *dev,
PMD_INIT_FUNC_TRACE();
- ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
- if (ret != 0)
- return ret;
+ nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
/* Validating number of descriptors */
tx_desc_sz = nb_desc * sizeof(struct nfp_net_nfdk_tx_desc);
@@ -1146,30 +1146,16 @@ nfp_net_xstats_reset(struct rte_eth_dev *dev)
return nfp_net_stats_reset(dev);
}
-int
+void
nfp_net_rx_desc_limits(struct nfp_net_hw *hw,
uint16_t *min_rx_desc,
uint16_t *max_rx_desc)
{
- *max_rx_desc = NFP_NET_MAX_RX_DESC;
-
- switch (hw->device_id) {
- case PCI_DEVICE_ID_NFP3800_PF_NIC:
- case PCI_DEVICE_ID_NFP3800_VF_NIC:
- *min_rx_desc = NFP3800_NET_MIN_RX_DESC;
- return 0;
- case PCI_DEVICE_ID_NFP4000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_VF_NIC:
- *min_rx_desc = NFP_NET_MIN_RX_DESC;
- return 0;
- default:
- PMD_DRV_LOG(ERR, "Unknown NFP device id.");
- return -EINVAL;
- }
+ *max_rx_desc = hw->pf_dev->dev_info->max_qc_size;
+ *min_rx_desc = hw->pf_dev->dev_info->min_qc_size;
}
-int
+void
nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
uint16_t *min_tx_desc,
uint16_t *max_tx_desc)
@@ -1181,28 +1167,13 @@ nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
else
tx_dpp = NFDK_TX_DESC_PER_SIMPLE_PKT;
- *max_tx_desc = NFP_NET_MAX_TX_DESC / tx_dpp;
-
- switch (hw->device_id) {
- case PCI_DEVICE_ID_NFP3800_PF_NIC:
- case PCI_DEVICE_ID_NFP3800_VF_NIC:
- *min_tx_desc = NFP3800_NET_MIN_TX_DESC / tx_dpp;
- return 0;
- case PCI_DEVICE_ID_NFP4000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_VF_NIC:
- *min_tx_desc = NFP_NET_MIN_TX_DESC / tx_dpp;
- return 0;
- default:
- PMD_DRV_LOG(ERR, "Unknown NFP device id.");
- return -EINVAL;
- }
+ *max_tx_desc = hw->pf_dev->dev_info->max_qc_size / tx_dpp;
+ *min_tx_desc = hw->pf_dev->dev_info->min_qc_size / tx_dpp;
}
int
nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
{
- int ret;
uint16_t min_rx_desc;
uint16_t max_rx_desc;
uint16_t min_tx_desc;
@@ -1211,13 +1182,8 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- ret = nfp_net_rx_desc_limits(hw, &min_rx_desc, &max_rx_desc);
- if (ret != 0)
- return ret;
-
- ret = nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
- if (ret != 0)
- return ret;
+ nfp_net_rx_desc_limits(hw, &min_rx_desc, &max_rx_desc);
+ nfp_net_tx_desc_limits(hw, &min_tx_desc, &max_tx_desc);
dev_info->max_rx_queues = (uint16_t)hw->max_rx_queues;
dev_info->max_tx_queues = (uint16_t)hw->max_tx_queues;
@@ -7,16 +7,9 @@
#define _NFP_COMMON_H_
#include "nfp_ctrl.h"
+#include "nfpcore/nfp_dev.h"
#define NFP_NET_PMD_VERSION "0.1"
-#define PCI_VENDOR_ID_NETRONOME 0x19ee
-#define PCI_VENDOR_ID_CORIGINE 0x1da8
-
-#define PCI_DEVICE_ID_NFP3800_PF_NIC 0x3800
-#define PCI_DEVICE_ID_NFP3800_VF_NIC 0x3803
-#define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000
-#define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000
-#define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003 /* Include NFP4000VF */
/* Forward declaration */
struct nfp_net_adapter;
@@ -28,7 +21,6 @@ struct nfp_net_adapter;
#define NFP_NET_CRTL_BAR 0
#define NFP_NET_TX_BAR 2
#define NFP_NET_RX_BAR 2
-#define NFP_QCP_QUEUE_AREA_SZ 0x80000
/* Macros for accessing the Queue Controller Peripheral 'CSRs' */
#define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800)
@@ -39,17 +31,6 @@ struct nfp_net_adapter;
#define NFP_QCP_QUEUE_STS_HI 0x000c
#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask (0x3ffff)
-#define NFP_PCIE_QCP_NFP3800_OFFSET 0x400000
-#define NFP_PCIE_QCP_NFP6000_OFFSET 0x80000
-#define NFP_PCIE_QUEUE_NFP3800_MASK 0x1ff
-#define NFP_PCIE_QUEUE_NFP6000_MASK 0xff
-#define NFP_PCIE_QCP_PF_OFFSET 0x0
-#define NFP_PCIE_QCP_VF_OFFSET 0x0
-
-/* The offset of the queue controller queues in the PCIe Target */
-#define NFP_PCIE_QUEUE(_offset, _q, _mask) \
- ((_offset) + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & (_mask))))
-
/* Interrupt definitions */
#define NFP_NET_IRQ_LSC_IDX 0
@@ -111,6 +92,9 @@ struct nfp_pf_dev {
/* Backpointer to associated pci device */
struct rte_pci_device *pci_dev;
+ /** NFP ASIC params */
+ const struct nfp_dev_info *dev_info;
+
enum nfp_app_fw_id app_fw_id;
/* Pointer to the app running on the PF */
@@ -352,23 +336,11 @@ nfp_qcp_read(uint8_t *q, enum nfp_qcp_ptr ptr)
}
static inline uint32_t
-nfp_pci_queue(struct rte_pci_device *pdev, uint16_t queue)
+nfp_qcp_queue_offset(const struct nfp_dev_info *dev_info,
+ uint16_t queue)
{
- switch (pdev->id.device_id) {
- case PCI_DEVICE_ID_NFP4000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_PF_NIC:
- return NFP_PCIE_QUEUE(NFP_PCIE_QCP_PF_OFFSET, queue,
- NFP_PCIE_QUEUE_NFP6000_MASK);
- case PCI_DEVICE_ID_NFP3800_VF_NIC:
- return NFP_PCIE_QUEUE(NFP_PCIE_QCP_VF_OFFSET, queue,
- NFP_PCIE_QUEUE_NFP3800_MASK);
- case PCI_DEVICE_ID_NFP6000_VF_NIC:
- return NFP_PCIE_QUEUE(NFP_PCIE_QCP_VF_OFFSET, queue,
- NFP_PCIE_QUEUE_NFP6000_MASK);
- default:
- return NFP_PCIE_QUEUE(NFP_PCIE_QCP_PF_OFFSET, queue,
- NFP_PCIE_QUEUE_NFP3800_MASK);
- }
+ return dev_info->qc_addr_offset + NFP_QCP_QUEUE_ADDR_SZ *
+ (queue & dev_info->qc_idx_mask);
}
/* Prototypes for common NFP functions */
@@ -434,10 +406,10 @@ void nfp_net_close_rx_queue(struct rte_eth_dev *dev);
void nfp_net_stop_tx_queue(struct rte_eth_dev *dev);
void nfp_net_close_tx_queue(struct rte_eth_dev *dev);
int nfp_net_set_vxlan_port(struct nfp_net_hw *hw, size_t idx, uint16_t port);
-int nfp_net_rx_desc_limits(struct nfp_net_hw *hw,
+void nfp_net_rx_desc_limits(struct nfp_net_hw *hw,
uint16_t *min_rx_desc,
uint16_t *max_rx_desc);
-int nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
+void nfp_net_tx_desc_limits(struct nfp_net_hw *hw,
uint16_t *min_tx_desc,
uint16_t *max_tx_desc);
int nfp_net_check_dma_mask(struct nfp_net_hw *hw, char *name);
@@ -496,9 +496,8 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
struct nfp_app_fw_nic *app_fw_nic;
struct nfp_net_hw *hw;
struct rte_ether_addr *tmp_ether_addr;
- uint64_t rx_bar_off = 0;
- uint64_t tx_bar_off = 0;
- uint32_t start_q;
+ uint64_t rx_base;
+ uint64_t tx_base;
int port = 0;
int err;
@@ -576,25 +575,14 @@ nfp_net_init(struct rte_eth_dev *eth_dev)
/* Work out where in the BAR the queues start. */
- switch (pci_dev->id.device_id) {
- case PCI_DEVICE_ID_NFP3800_PF_NIC:
- case PCI_DEVICE_ID_NFP4000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_PF_NIC:
- start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);
- tx_bar_off = nfp_pci_queue(pci_dev, start_q);
- start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);
- rx_bar_off = nfp_pci_queue(pci_dev, start_q);
- break;
- default:
- PMD_DRV_LOG(ERR, "nfp_net: no device ID matching");
- return -ENODEV;
- }
+ tx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);
+ rx_base = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);
- PMD_INIT_LOG(DEBUG, "tx_bar_off: 0x%" PRIx64 "", tx_bar_off);
- PMD_INIT_LOG(DEBUG, "rx_bar_off: 0x%" PRIx64 "", rx_bar_off);
+ PMD_INIT_LOG(DEBUG, "tx_base: 0x%" PRIx64 "", tx_base);
+ PMD_INIT_LOG(DEBUG, "rx_base: 0x%" PRIx64 "", rx_base);
- hw->tx_bar = pf_dev->qc_bar + tx_bar_off;
- hw->rx_bar = pf_dev->qc_bar + rx_bar_off;
+ hw->tx_bar = pf_dev->qc_bar + tx_base * NFP_QCP_QUEUE_ADDR_SZ;
+ hw->rx_bar = pf_dev->qc_bar + rx_base * NFP_QCP_QUEUE_ADDR_SZ;
eth_dev->data->dev_private = hw;
PMD_INIT_LOG(DEBUG, "ctrl_bar: %p, tx_bar: %p, rx_bar: %p",
@@ -902,10 +890,17 @@ nfp_pf_init(struct rte_pci_device *pci_dev)
char name[RTE_ETH_NAME_MAX_LEN];
struct nfp_rtsym_table *sym_tbl;
struct nfp_eth_table *nfp_eth_table;
+ const struct nfp_dev_info *dev_info;
if (pci_dev == NULL)
return -ENODEV;
+ dev_info = nfp_dev_info_get(pci_dev->id.device_id);
+ if (dev_info == NULL) {
+ PMD_INIT_LOG(ERR, "Not supported device ID");
+ return -ENODEV;
+ }
+
/*
* When device bound to UIO, the device could be used, by mistake,
* by two DPDK apps, and the UIO driver does not avoid it. This
@@ -976,27 +971,14 @@ nfp_pf_init(struct rte_pci_device *pci_dev)
pf_dev->sym_tbl = sym_tbl;
pf_dev->pci_dev = pci_dev;
pf_dev->nfp_eth_table = nfp_eth_table;
+ pf_dev->dev_info = dev_info;
/* configure access to tx/rx vNIC BARs */
- switch (pci_dev->id.device_id) {
- case PCI_DEVICE_ID_NFP3800_PF_NIC:
- addr = NFP_PCIE_QUEUE(NFP_PCIE_QCP_NFP3800_OFFSET,
- 0, NFP_PCIE_QUEUE_NFP3800_MASK);
- break;
- case PCI_DEVICE_ID_NFP4000_PF_NIC:
- case PCI_DEVICE_ID_NFP6000_PF_NIC:
- addr = NFP_PCIE_QUEUE(NFP_PCIE_QCP_NFP6000_OFFSET,
- 0, NFP_PCIE_QUEUE_NFP6000_MASK);
- break;
- default:
- PMD_INIT_LOG(ERR, "nfp_net: no device ID matching");
- ret = -ENODEV;
- goto pf_cleanup;
- }
-
+ addr = nfp_qcp_queue_offset(pf_dev->dev_info, 0);
cpp_id = NFP_CPP_ISLAND_ID(0, NFP_CPP_ACTION_RW, 0, 0);
+
pf_dev->qc_bar = nfp_cpp_map_area(pf_dev->cpp, cpp_id,
- addr, NFP_QCP_QUEUE_AREA_SZ,
+ addr, pf_dev->dev_info->qc_area_sz,
&pf_dev->qc_area);
if (pf_dev->qc_bar == NULL) {
PMD_INIT_LOG(ERR, "nfp_rtsym_map fails for net.qc");
@@ -1111,10 +1093,17 @@ nfp_pf_secondary_init(struct rte_pci_device *pci_dev)
struct nfp_cpp *cpp;
enum nfp_app_fw_id app_fw_id;
struct nfp_rtsym_table *sym_tbl;
+ const struct nfp_dev_info *dev_info;
if (pci_dev == NULL)
return -ENODEV;
+ dev_info = nfp_dev_info_get(pci_dev->id.device_id);
+ if (dev_info == NULL) {
+ PMD_INIT_LOG(ERR, "Not supported device ID");
+ return -ENODEV;
+ }
+
/*
* When device bound to UIO, the device could be used, by mistake,
* by two DPDK apps, and the UIO driver does not avoid it. This
@@ -305,19 +305,10 @@ nfp_netvf_init(struct rte_eth_dev *eth_dev)
}
/* Work out where in the BAR the queues start. */
- switch (pci_dev->id.device_id) {
- case PCI_DEVICE_ID_NFP3800_VF_NIC:
- case PCI_DEVICE_ID_NFP6000_VF_NIC:
- start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);
- tx_bar_off = nfp_pci_queue(pci_dev, start_q);
- start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);
- rx_bar_off = nfp_pci_queue(pci_dev, start_q);
- break;
- default:
- PMD_DRV_LOG(ERR, "nfp_net: no device ID matching");
- err = -ENODEV;
- goto dev_err_ctrl_map;
- }
+ start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ);
+ tx_bar_off = nfp_qcp_queue_offset(hw->pf_dev->dev_info, start_q);
+ start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ);
+ rx_bar_off = nfp_qcp_queue_offset(hw->pf_dev->dev_info, start_q);
PMD_INIT_LOG(DEBUG, "tx_bar_off: 0x%" PRIx64 "", tx_bar_off);
PMD_INIT_LOG(DEBUG, "rx_bar_off: 0x%" PRIx64 "", rx_bar_off);
@@ -677,7 +677,6 @@ nfp_net_rx_queue_setup(struct rte_eth_dev *dev,
const struct rte_eth_rxconf *rx_conf,
struct rte_mempool *mp)
{
- int ret;
uint16_t min_rx_desc;
uint16_t max_rx_desc;
const struct rte_memzone *tz;
@@ -689,9 +688,7 @@ nfp_net_rx_queue_setup(struct rte_eth_dev *dev,
PMD_INIT_FUNC_TRACE();
- ret = nfp_net_rx_desc_limits(hw, &min_rx_desc, &max_rx_desc);
- if (ret != 0)
- return ret;
+ nfp_net_rx_desc_limits(hw, &min_rx_desc, &max_rx_desc);
/* Validating number of descriptors */
rx_desc_sz = nb_desc * sizeof(struct nfp_net_rx_desc);
@@ -74,18 +74,6 @@ struct nfp_meta_parsed {
} vlan[NFP_META_MAX_VLANS];
};
-/*
- * The maximum number of descriptors is limited by design as
- * DPDK uses uint16_t variables for these values
- */
-#define NFP_NET_MAX_TX_DESC (32 * 1024)
-#define NFP_NET_MIN_TX_DESC 256
-#define NFP3800_NET_MIN_TX_DESC 512
-
-#define NFP_NET_MAX_RX_DESC (32 * 1024)
-#define NFP_NET_MIN_RX_DESC 256
-#define NFP3800_NET_MIN_RX_DESC 512
-
/* Descriptor alignment */
#define NFP_ALIGN_RING_DESC 128
new file mode 100644
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#include "nfp_dev.h"
+
+#include <rte_bitops.h>
+
+#include "nfp_platform.h"
+
+/*
+ * Note: The value of 'max_qc_size' is different from kernel driver,
+ * because DPDK use 'uint16_t' as the data type.
+ */
+const struct nfp_dev_info nfp_dev_info[NFP_DEV_CNT] = {
+ [NFP_DEV_NFP3800] = {
+ .qc_idx_mask = GENMASK(8, 0),
+ .qc_addr_offset = 0x400000,
+ .min_qc_size = 512,
+ .max_qc_size = RTE_BIT32(15), /**< 32K */
+
+ .chip_names = "NFP3800",
+ .pcie_cfg_expbar_offset = 0x0a00,
+ .qc_area_sz = 0x100000,
+ .pf_num_per_unit = 4,
+ },
+ [NFP_DEV_NFP3800_VF] = {
+ .qc_idx_mask = GENMASK(8, 0),
+ .qc_addr_offset = 0,
+ .min_qc_size = 512,
+ .max_qc_size = RTE_BIT32(15), /**< 32K */
+ },
+ [NFP_DEV_NFP6000] = {
+ .qc_idx_mask = GENMASK(7, 0),
+ .qc_addr_offset = 0x80000,
+ .min_qc_size = 256,
+ .max_qc_size = RTE_BIT32(15), /**< 32K */
+
+ .chip_names = "NFP4000/NFP6000",
+ .pcie_cfg_expbar_offset = 0x0400,
+ .qc_area_sz = 0x80000,
+ .pf_num_per_unit = 1,
+ },
+ [NFP_DEV_NFP6000_VF] = {
+ .qc_idx_mask = GENMASK(7, 0),
+ .qc_addr_offset = 0,
+ .min_qc_size = 256,
+ .max_qc_size = RTE_BIT32(15), /**< 32K */
+ },
+};
+
+const struct nfp_dev_info *
+nfp_dev_info_get(uint16_t device_id)
+{
+ enum nfp_dev_id id;
+
+ switch (device_id) {
+ case PCI_DEVICE_ID_NFP3800_PF_NIC:
+ id = NFP_DEV_NFP3800;
+ break;
+ case PCI_DEVICE_ID_NFP3800_VF_NIC:
+ id = NFP_DEV_NFP3800_VF;
+ break;
+ case PCI_DEVICE_ID_NFP4000_PF_NIC:
+ case PCI_DEVICE_ID_NFP6000_PF_NIC:
+ id = NFP_DEV_NFP6000;
+ break;
+ case PCI_DEVICE_ID_NFP6000_VF_NIC:
+ id = NFP_DEV_NFP6000_VF;
+ break;
+ default:
+ id = NFP_DEV_CNT;
+ break;
+ }
+
+ if (id >= NFP_DEV_CNT)
+ return NULL;
+
+ return &nfp_dev_info[id];
+}
new file mode 100644
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Corigine, Inc.
+ * All rights reserved.
+ */
+
+#ifndef __NFP_DEV_H__
+#define __NFP_DEV_H__
+
+#include <stdint.h>
+
+#define PCI_VENDOR_ID_NETRONOME 0x19ee
+#define PCI_VENDOR_ID_CORIGINE 0x1da8
+
+#define PCI_DEVICE_ID_NFP3800_PF_NIC 0x3800
+#define PCI_DEVICE_ID_NFP3800_VF_NIC 0x3803
+#define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000
+#define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000
+#define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003 /* Include NFP4000VF */
+
+enum nfp_dev_id {
+ NFP_DEV_NFP3800,
+ NFP_DEV_NFP3800_VF,
+ NFP_DEV_NFP6000,
+ NFP_DEV_NFP6000_VF,
+ NFP_DEV_CNT,
+};
+
+struct nfp_dev_info {
+ /* Required fields */
+ uint32_t qc_idx_mask;
+ uint32_t qc_addr_offset;
+ uint32_t min_qc_size;
+ uint32_t max_qc_size;
+
+ /* PF-only fields */
+ const char *chip_names;
+ uint32_t pcie_cfg_expbar_offset;
+ uint32_t qc_area_sz;
+ uint8_t pf_num_per_unit;
+};
+
+const struct nfp_dev_info *nfp_dev_info_get(uint16_t device_id);
+
+#endif /* __NFP_DEV_H__ */