From patchwork Wed Aug 23 11:15:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Prakash Shukla X-Patchwork-Id: 130688 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 22935430DF; Wed, 23 Aug 2023 13:17:13 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B4F814325F; Wed, 23 Aug 2023 13:16:43 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id AF12D42D13 for ; Wed, 23 Aug 2023 13:16:39 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 37N72F88016649 for ; Wed, 23 Aug 2023 04:16:39 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=KxFuNahgXwPWhcKlq3YQo8VCb/edrSr+zZH4goJv0hM=; b=G5PBwCRbEwVtO7iFVnTtjPG7s4qARWqqfo37ivqMS56AmlbQAf+7B01WAcBai2Bu0lwA Dbky+BSS+RxedW6IdWe61Pi9a2pxbmMJsu49F1AYjzuQ1QfHYmLmrBCHoFHhmoqm9Zhn mcQ84CSU4KmfZSErfqLeY6NH+ckEDKHhiIP9DGU2/VfDwFlPFIKOWj8jaMJX2xesFDez 6jthVKF/eA3CxNZ8OxCSk1m4Z1iidZiBOD3j+SsMBKIxusWpFT6yBdDn84pEW2UXppU5 hIVOTdIxmqrocTkSeNloDk0q+MBNAwy2TECR+bgShrz9kPRU76CvOotHtsPPbk3ij+gh oQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3sn20ctmfg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 23 Aug 2023 04:16:39 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 23 Aug 2023 04:16:36 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 23 Aug 2023 04:16:36 -0700 Received: from localhost.localdomain (unknown [10.28.36.157]) by maili.marvell.com (Postfix) with ESMTP id 9BCB93F708A; Wed, 23 Aug 2023 04:16:35 -0700 (PDT) From: Amit Prakash Shukla To: Vamsi Attunuru CC: , Subject: [PATCH v5 12/12] dma/cnxk: track last index return value Date: Wed, 23 Aug 2023 16:45:25 +0530 Message-ID: <20230823111525.3975662-12-amitprakashs@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230823111525.3975662-1-amitprakashs@marvell.com> References: <20230821174942.3165191-1-amitprakashs@marvell.com> <20230823111525.3975662-1-amitprakashs@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: oK_QHzhdbT_e9XiOVftTRDM9zYFeiHwq X-Proofpoint-ORIG-GUID: oK_QHzhdbT_e9XiOVftTRDM9zYFeiHwq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-08-23_06,2023-08-22_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vamsi Attunuru last index value might lost the order when dma stats are reset in between copy operations. Patch adds a variable to track the completed count, that can be used to compute the last index, also patch adds misc other changes. Signed-off-by: Vamsi Attunuru --- v2: - Fix for bugs observed in v1. - Squashed few commits. v3: - Resolved review suggestions. - Code improvement. v4: - Resolved checkpatch warnings. v5: - Updated commit message. - Split the commits. drivers/dma/cnxk/cnxk_dmadev.c | 17 ++++++++++------- drivers/dma/cnxk/cnxk_dmadev.h | 1 + 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c index 89ff4c18ac..eec6a897e2 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.c +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -298,6 +298,7 @@ cnxk_dmadev_start(struct rte_dma_dev *dev) } cnxk_stats_reset(dev, i); + dpi_conf->completed_offset = 0; } roc_dpi_enable(&dpivf->rdpi); @@ -479,7 +480,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t d dpi_conf->pending++; } - return (dpi_conf->desc_idx++); + return dpi_conf->desc_idx++; } static int @@ -545,13 +546,13 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpi_conf->stats.submitted += nb_src; + dpi_conf->stats.submitted++; } else { dpi_conf->pnum_words += num_words; dpi_conf->pending++; } - return (dpi_conf->desc_idx++); + return dpi_conf->desc_idx++; } static int @@ -664,13 +665,13 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge if (flags & RTE_DMA_OP_FLAG_SUBMIT) { rte_wmb(); plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL); - dpi_conf->stats.submitted += nb_src; + dpi_conf->stats.submitted++; } else { dpi_conf->pnum_words += num_words; dpi_conf->pending++; } - return (dpi_conf->desc_idx++); + return dpi_conf->desc_idx++; } static uint16_t @@ -700,7 +701,7 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls, } dpi_conf->stats.completed += cnt; - *last_idx = dpi_conf->stats.completed - 1; + *last_idx = (dpi_conf->completed_offset + dpi_conf->stats.completed - 1) & 0xffff; return cnt; } @@ -729,7 +730,7 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, const uint16_t n } dpi_conf->stats.completed += cnt; - *last_idx = dpi_conf->stats.completed - 1; + *last_idx = (dpi_conf->completed_offset + dpi_conf->stats.completed - 1) & 0xffff; return cnt; } @@ -814,6 +815,7 @@ cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan) if (vchan == RTE_DMA_ALL_VCHAN) { for (i = 0; i < dpivf->num_vchans; i++) { dpi_conf = &dpivf->conf[i]; + dpi_conf->completed_offset += dpi_conf->stats.completed; dpi_conf->stats = (struct rte_dma_stats){0}; } @@ -824,6 +826,7 @@ cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan) return -EINVAL; dpi_conf = &dpivf->conf[vchan]; + dpi_conf->completed_offset += dpi_conf->stats.completed; dpi_conf->stats = (struct rte_dma_stats){0}; return 0; diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h index 9c6c898d23..254e7fea20 100644 --- a/drivers/dma/cnxk/cnxk_dmadev.h +++ b/drivers/dma/cnxk/cnxk_dmadev.h @@ -41,6 +41,7 @@ struct cnxk_dpi_conf { uint16_t desc_idx; uint16_t pad0; struct rte_dma_stats stats; + uint64_t completed_offset; }; struct cnxk_dpi_vf_s {