diff mbox series

[v4,5/8] dma/cnxk: increase vchan per queue to max 4

Message ID 20230821174942.3165191-5-amitprakashs@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Jerin Jacob
Headers
Series [v4,1/8] common/cnxk: use unique name for DPI memzone |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Amit Prakash Shukla Aug. 21, 2023, 5:49 p.m. UTC 
  To support multiple directions in same queue make use of multiple vchan
per queue. Each vchan can be configured in some direction and used.

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 68 +++++++++++++++-------------------
 drivers/dma/cnxk/cnxk_dmadev.h | 11 +++---
 2 files changed, 36 insertions(+), 43 deletions(-)
diff mbox series

Patch

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index d8cfb98cd7..7d83b70e8b 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -22,8 +22,8 @@  cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info *dev_inf
 	RTE_SET_USED(dev);
 	RTE_SET_USED(size);
 
-	dev_info->max_vchans = 1;
-	dev_info->nb_vchans = 1;
+	dev_info->max_vchans = MAX_VCHANS_PER_QUEUE;
+	dev_info->nb_vchans = MAX_VCHANS_PER_QUEUE;
 	dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV |
 			     RTE_DMA_CAPA_DEV_TO_MEM | RTE_DMA_CAPA_DEV_TO_DEV |
 			     RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
@@ -65,13 +65,12 @@  cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
 			const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
-	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
 	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	uint16_t max_desc;
 	uint32_t size;
 	int i;
 
-	RTE_SET_USED(vchan);
 	RTE_SET_USED(conf_sz);
 
 	if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -149,13 +148,12 @@  cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
 			 const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
-	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
 	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	uint16_t max_desc;
 	uint32_t size;
 	int i;
 
-	RTE_SET_USED(vchan);
 	RTE_SET_USED(conf_sz);
 
 	if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -360,18 +358,17 @@  cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t d
 		 uint64_t flags)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	uint64_t cmd[DPI_MAX_CMD_SIZE];
 	rte_iova_t fptr, lptr;
 	int num_words = 0;
 	int rc;
 
-	RTE_SET_USED(vchan);
-
-	comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+	comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
 	header->cn9k.ptr = (uint64_t)comp_ptr;
-	STRM_INC(dpivf->conf.c_desc, tail);
+	STRM_INC(dpi_conf->c_desc, tail);
 
 	header->cn9k.nfst = 1;
 	header->cn9k.nlst = 1;
@@ -400,7 +397,7 @@  cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t d
 
 	rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
 	if (unlikely(rc)) {
-		STRM_DEC(dpivf->conf.c_desc, tail);
+		STRM_DEC(dpi_conf->c_desc, tail);
 		return rc;
 	}
 
@@ -421,18 +418,17 @@  cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
 		    const struct rte_dma_sge *dst, uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	const struct rte_dma_sge *fptr, *lptr;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	uint64_t cmd[DPI_MAX_CMD_SIZE];
 	int num_words = 0;
 	int i, rc;
 
-	RTE_SET_USED(vchan);
-
-	comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+	comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
 	header->cn9k.ptr = (uint64_t)comp_ptr;
-	STRM_INC(dpivf->conf.c_desc, tail);
+	STRM_INC(dpi_conf->c_desc, tail);
 
 	/*
 	 * For inbound case, src pointers are last pointers.
@@ -468,7 +464,7 @@  cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
 
 	rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
 	if (unlikely(rc)) {
-		STRM_DEC(dpivf->conf.c_desc, tail);
+		STRM_DEC(dpi_conf->c_desc, tail);
 		return rc;
 	}
 
@@ -489,18 +485,17 @@  cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t
 		  uint32_t length, uint64_t flags)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	uint64_t cmd[DPI_MAX_CMD_SIZE];
 	rte_iova_t fptr, lptr;
 	int num_words = 0;
 	int rc;
 
-	RTE_SET_USED(vchan);
-
-	comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+	comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
 	header->cn10k.ptr = (uint64_t)comp_ptr;
-	STRM_INC(dpivf->conf.c_desc, tail);
+	STRM_INC(dpi_conf->c_desc, tail);
 
 	header->cn10k.nfst = 1;
 	header->cn10k.nlst = 1;
@@ -520,7 +515,7 @@  cn10k_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src, rte_iova_t
 
 	rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
 	if (unlikely(rc)) {
-		STRM_DEC(dpivf->conf.c_desc, tail);
+		STRM_DEC(dpi_conf->c_desc, tail);
 		return rc;
 	}
 
@@ -542,18 +537,17 @@  cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
 		     uint64_t flags)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	union dpi_instr_hdr_s *header = &dpi_conf->hdr;
 	const struct rte_dma_sge *fptr, *lptr;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	uint64_t cmd[DPI_MAX_CMD_SIZE];
 	int num_words = 0;
 	int i, rc;
 
-	RTE_SET_USED(vchan);
-
-	comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+	comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
 	header->cn10k.ptr = (uint64_t)comp_ptr;
-	STRM_INC(dpivf->conf.c_desc, tail);
+	STRM_INC(dpi_conf->c_desc, tail);
 
 	header->cn10k.nfst = nb_src & DPI_MAX_POINTER;
 	header->cn10k.nlst = nb_dst & DPI_MAX_POINTER;
@@ -579,7 +573,7 @@  cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, const struct rte_dma_sge
 
 	rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
 	if (unlikely(rc)) {
-		STRM_DEC(dpivf->conf.c_desc, tail);
+		STRM_DEC(dpi_conf->c_desc, tail);
 		return rc;
 	}
 
@@ -600,12 +594,11 @@  cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t nb_cpls,
 		      bool *has_error)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	struct cnxk_dpi_cdesc_data_s *c_desc = &dpivf->conf.c_desc;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	struct cnxk_dpi_cdesc_data_s *c_desc = &dpi_conf->c_desc;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	int cnt;
 
-	RTE_SET_USED(vchan);
-
 	for (cnt = 0; cnt < nb_cpls; cnt++) {
 		comp_ptr = c_desc->compl_ptr[c_desc->head];
 
@@ -633,11 +626,11 @@  cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan, const uint16_t n
 			     uint16_t *last_idx, enum rte_dma_status_code *status)
 {
 	struct cnxk_dpi_vf_s *dpivf = dev_private;
-	struct cnxk_dpi_cdesc_data_s *c_desc = &dpivf->conf.c_desc;
+	struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+	struct cnxk_dpi_cdesc_data_s *c_desc = &dpi_conf->c_desc;
 	struct cnxk_dpi_compl_s *comp_ptr;
 	int cnt;
 
-	RTE_SET_USED(vchan);
 	RTE_SET_USED(last_idx);
 
 	for (cnt = 0; cnt < nb_cpls; cnt++) {
@@ -663,11 +656,10 @@  static uint16_t
 cnxk_damdev_burst_capacity(const void *dev_private, uint16_t vchan)
 {
 	const struct cnxk_dpi_vf_s *dpivf = (const struct cnxk_dpi_vf_s *)dev_private;
+	const struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
 	uint16_t burst_cap;
 
-	RTE_SET_USED(vchan);
-
-	burst_cap = dpivf->conf.c_desc.max_cnt -
+	burst_cap = dpi_conf->c_desc.max_cnt -
 		    ((dpivf->stats.submitted - dpivf->stats.completed) + dpivf->pending) + 1;
 
 	return burst_cap;
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index 9563295af0..4693960a19 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -6,10 +6,11 @@ 
 
 #include <roc_api.h>
 
-#define DPI_MAX_POINTER	 15
-#define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt)
-#define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1))
-#define DPI_MAX_DESC	 1024
+#define DPI_MAX_POINTER	     15
+#define STRM_INC(s, var)     ((s).var = ((s).var + 1) & (s).max_cnt)
+#define STRM_DEC(s, var)     ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : ((s).var - 1))
+#define DPI_MAX_DESC	     1024
+#define MAX_VCHANS_PER_QUEUE 4
 
 /* Set Completion data to 0xFF when request submitted,
  * upon successful request completion engine reset to completion status
@@ -39,7 +40,7 @@  struct cnxk_dpi_conf {
 
 struct cnxk_dpi_vf_s {
 	struct roc_dpi rdpi;
-	struct cnxk_dpi_conf conf;
+	struct cnxk_dpi_conf conf[MAX_VCHANS_PER_QUEUE];
 	struct rte_dma_stats stats;
 	uint16_t pending;
 	uint16_t pnum_words;