From patchwork Mon Aug 21 09:33:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Power, Ciara" X-Patchwork-Id: 130554 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 81BDA430BE; Mon, 21 Aug 2023 11:34:22 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 6E4EF41149; Mon, 21 Aug 2023 11:34:22 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 05D9540A7D for ; Mon, 21 Aug 2023 11:34:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1692610461; x=1724146461; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rXB9DzOJb1D7+cklaLIBZCzW2eJZ/2PdyIhJSqL42yc=; b=dAw0u8fKmDr2kVbti4OJ6ozvEhrcPtYmJQFOa7tB7XefHwST3we4kjRl BF0gmPz3bkQ9uehY4PUVYFXci0y+vGJOTUdzCizq6FCRKvyfUn08RbIW+ uS52bBE+nThI7mO+BQrRFhNTR48HC6Xz4mqlpPV9NpiagJVYMGVovJP1/ NoQX4pkDKYrBtVXg5dkZnLF9eIrpm7t0suYzMz/XV6EmXvQcHHBzgCom7 XrUGD+4e/qFNOHyqtWddvkjOUJdBAOJjDCyTM6lA69gkqy/kzzCP/tQS1 yZGz84LiPHC35lRsfJYp8H53u47zwIbnA4/7yaHEJ6nXjg9vu1LGIT36+ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10808"; a="372446454" X-IronPort-AV: E=Sophos;i="6.01,189,1684825200"; d="scan'208";a="372446454" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Aug 2023 02:33:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10808"; a="770876674" X-IronPort-AV: E=Sophos;i="6.01,189,1684825200"; d="scan'208";a="770876674" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.80]) by orsmga001.jf.intel.com with ESMTP; 21 Aug 2023 02:33:56 -0700 From: Ciara Power To: dev@dpdk.org Cc: arkadiuszx.kusztal@intel.com, david.marchand@redhat.com, Ciara Power , Kai Ji Subject: [PATCH v2] common/qat: enable QAT 2.0c devices Date: Mon, 21 Aug 2023 09:33:49 +0000 Message-Id: <20230821093349.3519591-1-ciara.power@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230811123833.3114791-1-ciara.power@intel.com> References: <20230811123833.3114791-1-ciara.power@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit enables QAT 2.0c devices in the Intel QuickAssist Technology PMD. These are 4th Generation QAT, 402xx devices. Signed-off-by: Ciara Power Acked-by: Brian Dooley --- v2: - Fixed kernel module. - Modified commit to align naming of new QAT device. --- doc/guides/cryptodevs/qat.rst | 4 ++++ doc/guides/rel_notes/release_23_11.rst | 4 ++++ drivers/common/qat/qat_device.c | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index afdfb0bd22..730113da33 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -457,6 +457,10 @@ to see the full table) +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 4 | 401xxx | IDZ/ N/A | qat_401xxx | 4xxx | 4942 | 2 | 4943 | 16 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | Yes | Yes | 4 | 402xx | linux/6.4+ | qat_4xxx | 4xxx | 4944 | 2 | 4945 | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | No | No | 4 | 402xx | IDZ/ N/A | qat_4xxx | 4xxx | 4944 | 2 | 4945 | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ * Note: Symmetric mixed crypto algorithms feature on Gen 2 works only with IDZ driver version 4.9.0+ diff --git a/doc/guides/rel_notes/release_23_11.rst b/doc/guides/rel_notes/release_23_11.rst index 4411bb32c1..72dfb3fbf0 100644 --- a/doc/guides/rel_notes/release_23_11.rst +++ b/doc/guides/rel_notes/release_23_11.rst @@ -72,6 +72,10 @@ New Features Also, make sure to start the actual text at the margin. ======================================================= +* **Added support for QAT 2.0c devices to Intel QuickAssist Technology PMD.** + + * QAT 2.0c (4944) devices are now enabled for QAT. + Removed Items ------------- diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index 2675f0d9d1..cbf1e6a988 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -50,6 +50,9 @@ static const struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x4943), }, + { + RTE_PCI_DEVICE(0x8086, 0x4945), + }, {.device_id = 0}, }; @@ -202,6 +205,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev, break; case 0x4941: case 0x4943: + case 0x4945: qat_dev_gen = QAT_GEN4; break; default: