net/mlx5: fix query for NIC flow cap

Message ID 20230706123616.2484-1-orika@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: fix query for NIC flow cap |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-aarch-unit-testing success Testing PASS
ci/iol-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/intel-Functional success Functional PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS

Commit Message

Ori Kam July 6, 2023, 12:36 p.m. UTC
  Add query for nic flow table support bit.

Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bingz@nvidia.com

Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Suanming Mou suanmingm@nvidia.com
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
 1 file changed, 1 insertion(+)
  

Comments

Raslan Darawsheh July 10, 2023, 12:48 p.m. UTC | #1
Hi,

> -----Original Message-----
> From: Ori Kam <orika@nvidia.com>
> Sent: Thursday, July 6, 2023 3:36 PM
> To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Suanming Mou <suanmingm@nvidia.com>; Bing
> Zhao <bingz@nvidia.com>
> Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>
> Subject: [PATCH] net/mlx5: fix query for NIC flow cap
> 
> Add query for nic flow table support bit.
> 
> Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
> Cc: bingz@nvidia.com
> 
> Signed-off-by: Ori Kam <orika@nvidia.com>
> Acked-by: Suanming Mou suanmingm@nvidia.com

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
  

Patch

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index ef87862a6d..66a77159a0 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1078,6 +1078,7 @@  mlx5_devx_cmd_query_hca_attr(void *ctx,
 					 general_obj_types) &
 			      MLX5_GENERAL_OBJ_TYPES_CAP_CONN_TRACK_OFFLOAD);
 	attr->rq_delay_drop = MLX5_GET(cmd_hca_cap, hcattr, rq_delay_drop);
+	attr->nic_flow_table = MLX5_GET(cmd_hca_cap, hcattr, nic_flow_table);
 	attr->striding_rq = MLX5_GET(cmd_hca_cap, hcattr, striding_rq);
 	attr->ext_stride_num_range =
 		MLX5_GET(cmd_hca_cap, hcattr, ext_stride_num_range);