diff mbox series

[1/2] config/arm: update config for Neoverse N2

Message ID 20230529055751.3035712-1-ruifeng.wang@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series [1/2] config/arm: update config for Neoverse N2 |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Ruifeng Wang May 29, 2023, 5:57 a.m. UTC 
  Updated maximum number of lcores and numa nodes to support platforms
with multiple numa nodes.
Added mcpu compiler option.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
---
 config/arm/meson.build | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Juraj Linkeš May 29, 2023, 7:41 a.m. UTC | #1 
Acked-by: Juraj Linkeš <juraj.linkes@pantheon.tech>

On Mon, May 29, 2023 at 7:58 AM Ruifeng Wang <ruifeng.wang@arm.com> wrote:

> Updated maximum number of lcores and numa nodes to support platforms
> with multiple numa nodes.
> Added mcpu compiler option.
>
> Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
> ---
>  config/arm/meson.build | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index 5213434ca4..9e55e9f2a4 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -91,11 +91,12 @@ part_number_config_arm = {
>      '0xd49': {
>          'march': 'armv8.5-a',
>          'march_features': ['sve2'],
> +       'compiler_options':  ['-mcpu=neoverse-n2'],
>          'flags': [
>              ['RTE_MACHINE', '"neoverse-n2"'],
>              ['RTE_ARM_FEATURE_ATOMICS', true],
> -            ['RTE_MAX_LCORE', 64],
> -            ['RTE_MAX_NUMA_NODES', 1]
> +            ['RTE_MAX_LCORE', 128],
> +            ['RTE_MAX_NUMA_NODES', 2]
>          ]
>      }
>  }
> --
> 2.25.1
>
>
Thomas Monjalon June 6, 2023, 1:51 p.m. UTC | #2 
29/05/2023 07:57, Ruifeng Wang:
> Updated maximum number of lcores and numa nodes to support platforms
> with multiple numa nodes.
> Added mcpu compiler option.
> 
> Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Reviewed-by: Feifei Wang <feifei.wang2@arm.com>

Series applied, thanks.
Pavan Nikhilesh Bhagavatula June 7, 2023, 3:11 p.m. UTC | #3 
> Updated maximum number of lcores and numa nodes to support platforms
> with multiple numa nodes.
> Added mcpu compiler option.
> 
> Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
> ---
>  config/arm/meson.build | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/config/arm/meson.build b/config/arm/meson.build
> index 5213434ca4..9e55e9f2a4 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -91,11 +91,12 @@ part_number_config_arm = {
>      '0xd49': {
>          'march': 'armv8.5-a',
>          'march_features': ['sve2'],
> +	'compiler_options':  ['-mcpu=neoverse-n2'],

Hi Ruifeng, 
I see the following warning when compiling with GCC 12

cc1: warning: switch '-mcpu=neoverse-n2' conflicts with '-march=armv8.5-a+sve2+crypto' switch

Removing 'armv8.5-a' from the list makes the warning go away but what's the correct march for neoverse-n2?
Armv9.0-a is not a supported march flag in GCC.

>          'flags': [
>              ['RTE_MACHINE', '"neoverse-n2"'],
>              ['RTE_ARM_FEATURE_ATOMICS', true],
> -            ['RTE_MAX_LCORE', 64],
> -            ['RTE_MAX_NUMA_NODES', 1]
> +            ['RTE_MAX_LCORE', 128],
> +            ['RTE_MAX_NUMA_NODES', 2]
>          ]
>      }
>  }
> --
> 2.25.1
Ruifeng Wang June 8, 2023, 4:29 a.m. UTC | #4 
> -----Original Message-----
> From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
> Sent: Wednesday, June 7, 2023 11:12 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>; bruce.richardson@intel.com
> Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>;
> Feifei Wang <Feifei.Wang2@arm.com>; nd <nd@arm.com>
> Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2
> 
> > Updated maximum number of lcores and numa nodes to support platforms
> > with multiple numa nodes.
> > Added mcpu compiler option.
> >
> > Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
> > ---
> >  config/arm/meson.build | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > 5213434ca4..9e55e9f2a4 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -91,11 +91,12 @@ part_number_config_arm = {
> >      '0xd49': {
> >          'march': 'armv8.5-a',
> >          'march_features': ['sve2'],
> > +	'compiler_options':  ['-mcpu=neoverse-n2'],
> 
> Hi Ruifeng,

Hi Pavan,

> I see the following warning when compiling with GCC 12
> 
> cc1: warning: switch '-mcpu=neoverse-n2' conflicts with '-march=armv8.5-a+sve2+crypto'
> switch
> 
> Removing 'armv8.5-a' from the list makes the warning go away but what's the correct march
> for neoverse-n2?
> Armv9.0-a is not a supported march flag in GCC.

Thanks for pointing this out.
Neoverse-n2 is v9.0-a. The corresponding march flag in GCC is 'armv9-a' [1]. 
'armv8.5-a' should be removed from the list. It was used when armv9-a/neoverse-n2 is not available in compilers.

[1] https://gcc.gnu.org/onlinedocs/gcc-12.3.0/gcc/AArch64-Options.html

> 
> >          'flags': [
> >              ['RTE_MACHINE', '"neoverse-n2"'],
> >              ['RTE_ARM_FEATURE_ATOMICS', true],
> > -            ['RTE_MAX_LCORE', 64],
> > -            ['RTE_MAX_NUMA_NODES', 1]
> > +            ['RTE_MAX_LCORE', 128],
> > +            ['RTE_MAX_NUMA_NODES', 2]
> >          ]
> >      }
> >  }
> > --
> > 2.25.1
Pavan Nikhilesh Bhagavatula June 8, 2023, 4:34 a.m. UTC | #5 
> -----Original Message-----
> From: Ruifeng Wang <Ruifeng.Wang@arm.com>
> Sent: Thursday, June 8, 2023 9:59 AM
> To: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>;
> bruce.richardson@intel.com
> Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran <jerinj@marvell.com>;
> Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; Feifei Wang
> <Feifei.Wang2@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2
> 
> > -----Original Message-----
> > From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
> > Sent: Wednesday, June 7, 2023 11:12 PM
> > To: Ruifeng Wang <Ruifeng.Wang@arm.com>; bruce.richardson@intel.com
> > Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>;
> > Feifei Wang <Feifei.Wang2@arm.com>; nd <nd@arm.com>
> > Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2
> >
> > > Updated maximum number of lcores and numa nodes to support
> platforms
> > > with multiple numa nodes.
> > > Added mcpu compiler option.
> > >
> > > Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > > Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
> > > ---
> > >  config/arm/meson.build | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > > 5213434ca4..9e55e9f2a4 100644
> > > --- a/config/arm/meson.build
> > > +++ b/config/arm/meson.build
> > > @@ -91,11 +91,12 @@ part_number_config_arm = {
> > >      '0xd49': {
> > >          'march': 'armv8.5-a',
> > >          'march_features': ['sve2'],
> > > +	'compiler_options':  ['-mcpu=neoverse-n2'],
> >
> > Hi Ruifeng,
> 
> Hi Pavan,
> 
> > I see the following warning when compiling with GCC 12
> >
> > cc1: warning: switch '-mcpu=neoverse-n2' conflicts with '-march=armv8.5-
> a+sve2+crypto'
> > switch
> >
> > Removing 'armv8.5-a' from the list makes the warning go away but what's
> the correct march
> > for neoverse-n2?
> > Armv9.0-a is not a supported march flag in GCC.
> 
> Thanks for pointing this out.
> Neoverse-n2 is v9.0-a. The corresponding march flag in GCC is 'armv9-a' [1].
> 'armv8.5-a' should be removed from the list. It was used when armv9-
> a/neoverse-n2 is not available in compilers.

I see, should I send a fix? 

> 
> [1] https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__gcc.gnu.org_onlinedocs_gcc-2D12.3.0_gcc_AArch64-
> 2DOptions.html&d=DwIFAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=E3SgYMjtKCM
> VsB-fmvgGV3o-
> g_fjLhk5Pupi9ijohpc&m=v0RqCjWj9zEynw7pgt6ghZX4BNI5Vnk0UxA4sYAxRr
> RtO8lLHUhKYCNTniy2Jb5L&s=tEj1y2WPKFeatDFYUFqX49tv-
> 2rG2wx0UiWklOYUvhY&e=
> 
> >
> > >          'flags': [
> > >              ['RTE_MACHINE', '"neoverse-n2"'],
> > >              ['RTE_ARM_FEATURE_ATOMICS', true],
> > > -            ['RTE_MAX_LCORE', 64],
> > > -            ['RTE_MAX_NUMA_NODES', 1]
> > > +            ['RTE_MAX_LCORE', 128],
> > > +            ['RTE_MAX_NUMA_NODES', 2]
> > >          ]
> > >      }
> > >  }
> > > --
> > > 2.25.1
Ruifeng Wang June 8, 2023, 5:25 a.m. UTC | #6 
> -----Original Message-----
> From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
> Sent: Thursday, June 8, 2023 12:35 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>; bruce.richardson@intel.com
> Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>;
> Feifei Wang <Feifei.Wang2@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2
> 
> 
> 
> > -----Original Message-----
> > From: Ruifeng Wang <Ruifeng.Wang@arm.com>
> > Sent: Thursday, June 8, 2023 9:59 AM
> > To: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>;
> > bruce.richardson@intel.com
> > Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran <jerinj@marvell.com>;
> > Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; Feifei Wang
> > <Feifei.Wang2@arm.com>; nd <nd@arm.com>; nd <nd@arm.com>
> > Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse
> > N2
> >
> > > -----Original Message-----
> > > From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
> > > Sent: Wednesday, June 7, 2023 11:12 PM
> > > To: Ruifeng Wang <Ruifeng.Wang@arm.com>; bruce.richardson@intel.com
> > > Cc: dev@dpdk.org; jerinj@marvell.com; Honnappa Nagarahalli
> > <Honnappa.Nagarahalli@arm.com>;
> > > Feifei Wang <Feifei.Wang2@arm.com>; nd <nd@arm.com>
> > > Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for
> > > Neoverse N2
> > >
> > > > Updated maximum number of lcores and numa nodes to support
> > platforms
> > > > with multiple numa nodes.
> > > > Added mcpu compiler option.
> > > >
> > > > Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > > > Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
> > > > ---
> > > >  config/arm/meson.build | 5 +++--
> > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > > > 5213434ca4..9e55e9f2a4 100644
> > > > --- a/config/arm/meson.build
> > > > +++ b/config/arm/meson.build
> > > > @@ -91,11 +91,12 @@ part_number_config_arm = {
> > > >      '0xd49': {
> > > >          'march': 'armv8.5-a',
> > > >          'march_features': ['sve2'],
> > > > +	'compiler_options':  ['-mcpu=neoverse-n2'],
> > >
> > > Hi Ruifeng,
> >
> > Hi Pavan,
> >
> > > I see the following warning when compiling with GCC 12
> > >
> > > cc1: warning: switch '-mcpu=neoverse-n2' conflicts with
> > > '-march=armv8.5-
> > a+sve2+crypto'
> > > switch
> > >
> > > Removing 'armv8.5-a' from the list makes the warning go away but
> > > what's
> > the correct march
> > > for neoverse-n2?
> > > Armv9.0-a is not a supported march flag in GCC.
> >
> > Thanks for pointing this out.
> > Neoverse-n2 is v9.0-a. The corresponding march flag in GCC is 'armv9-a' [1].
> > 'armv8.5-a' should be removed from the list. It was used when armv9-
> > a/neoverse-n2 is not available in compilers.
> 
> I see, should I send a fix?

Sure. Please go ahead.
Thanks.

> 
> >
> > [1] https://urldefense.proofpoint.com/v2/url?u=https-
> > 3A__gcc.gnu.org_onlinedocs_gcc-2D12.3.0_gcc_AArch64-
> > 2DOptions.html&d=DwIFAg&c=nKjWec2b6R0mOyPaz7xtfQ&r=E3SgYMjtKCM
> > VsB-fmvgGV3o-
> > g_fjLhk5Pupi9ijohpc&m=v0RqCjWj9zEynw7pgt6ghZX4BNI5Vnk0UxA4sYAxRr
> > RtO8lLHUhKYCNTniy2Jb5L&s=tEj1y2WPKFeatDFYUFqX49tv-
> > 2rG2wx0UiWklOYUvhY&e=
> >
> > >
> > > >          'flags': [
> > > >              ['RTE_MACHINE', '"neoverse-n2"'],
> > > >              ['RTE_ARM_FEATURE_ATOMICS', true],
> > > > -            ['RTE_MAX_LCORE', 64],
> > > > -            ['RTE_MAX_NUMA_NODES', 1]
> > > > +            ['RTE_MAX_LCORE', 128],
> > > > +            ['RTE_MAX_NUMA_NODES', 2]
> > > >          ]
> > > >      }
> > > >  }
> > > > --
> > > > 2.25.1
diff mbox series

Patch

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 5213434ca4..9e55e9f2a4 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -91,11 +91,12 @@  part_number_config_arm = {
     '0xd49': {
         'march': 'armv8.5-a',
         'march_features': ['sve2'],
+	'compiler_options':  ['-mcpu=neoverse-n2'],
         'flags': [
             ['RTE_MACHINE', '"neoverse-n2"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
-            ['RTE_MAX_LCORE', 64],
-            ['RTE_MAX_NUMA_NODES', 1]
+            ['RTE_MAX_LCORE', 128],
+            ['RTE_MAX_NUMA_NODES', 2]
         ]
     }
 }