From patchwork Fri May 26 13:45:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 127564 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5758942BAB; Fri, 26 May 2023 15:45:18 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 318A940EE7; Fri, 26 May 2023 15:45:18 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8548F40DDA for ; Fri, 26 May 2023 15:45:16 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34QDeG55019347 for ; Fri, 26 May 2023 06:45:15 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=9w4tFvDLLeq9aNkZm/GZZaoGq0uShvsULRGUdoQUE60=; b=C0ENib1NAWXdY9+5TPTGZR14tl77QAPnaAg+OTPKDdtlMvKp0qw2LibnVmU4+nEa4Cuf +cVxgjtmyGg2eiXkv20Fr/to23JNr85BSt1hw0+aDkYn+z6ScmKmkvcQb+uzeW+2vFeY QS7ENrYuxxFF6x30AEl+UfqEkr5lVhGRcZcsQuUD8xNO23Cw8p4EJNhpjEc7gZ6B8XUi G94AN+K9humalNMM/Niaoj1c0X9NN01qa2NgV/+UljHy9KACtIJ7pAAmnNlHY520FsW2 cQJ3zHI4mV6OuuqzXSPsU+jPgGKfx8RAGUzjeFHuk2r1ASAFdsbNiTab1qgCjYLzP4Jv RA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3qsspt6w5n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 26 May 2023 06:45:15 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Fri, 26 May 2023 06:45:13 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Fri, 26 May 2023 06:45:13 -0700 Received: from localhost.localdomain (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id DCD233F703F; Fri, 26 May 2023 06:45:09 -0700 (PDT) From: Ashwin Sekhar T K To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ashwin Sekhar T K , "Pavan Nikhilesh" CC: , , , , Subject: [PATCH 1/2] mempool/cnxk: avoid indefinite wait Date: Fri, 26 May 2023 19:15:06 +0530 Message-ID: <20230526134507.885354-1-asekhar@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-GUID: qz6tqUocYbVZK3cEeZJTbletEoO3D3mY X-Proofpoint-ORIG-GUID: qz6tqUocYbVZK3cEeZJTbletEoO3D3mY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-26_04,2023-05-25_03,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Avoid waiting indefinitely when counting batch alloc pointers by adding a wait timeout. Signed-off-by: Ashwin Sekhar T K --- drivers/common/cnxk/roc_npa.h | 15 +++++++++------ drivers/mempool/cnxk/cn10k_mempool_ops.c | 3 ++- 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h index 21608a40d9..d3caa71586 100644 --- a/drivers/common/cnxk/roc_npa.h +++ b/drivers/common/cnxk/roc_npa.h @@ -241,19 +241,23 @@ roc_npa_aura_batch_alloc_issue(uint64_t aura_handle, uint64_t *buf, } static inline void -roc_npa_batch_alloc_wait(uint64_t *cache_line) +roc_npa_batch_alloc_wait(uint64_t *cache_line, unsigned int wait_us) { + const uint64_t ticks = (uint64_t)wait_us * plt_tsc_hz() / (uint64_t)1E6; + const uint64_t start = plt_tsc_cycles(); + /* Batch alloc status code is updated in bits [5:6] of the first word * of the 128 byte cache line. */ while (((__atomic_load_n(cache_line, __ATOMIC_RELAXED) >> 5) & 0x3) == ALLOC_CCODE_INVAL) - ; + if (wait_us && (plt_tsc_cycles() - start) >= ticks) + break; } static inline unsigned int roc_npa_aura_batch_alloc_count(uint64_t *aligned_buf, unsigned int num, - unsigned int do_wait) + unsigned int wait_us) { unsigned int count, i; @@ -267,8 +271,7 @@ roc_npa_aura_batch_alloc_count(uint64_t *aligned_buf, unsigned int num, status = (struct npa_batch_alloc_status_s *)&aligned_buf[i]; - if (do_wait) - roc_npa_batch_alloc_wait(&aligned_buf[i]); + roc_npa_batch_alloc_wait(&aligned_buf[i], wait_us); count += status->count; } @@ -293,7 +296,7 @@ roc_npa_aura_batch_alloc_extract(uint64_t *buf, uint64_t *aligned_buf, status = (struct npa_batch_alloc_status_s *)&aligned_buf[i]; - roc_npa_batch_alloc_wait(&aligned_buf[i]); + roc_npa_batch_alloc_wait(&aligned_buf[i], 0); line_count = status->count; diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c index ba826f0f01..ff0015d8de 100644 --- a/drivers/mempool/cnxk/cn10k_mempool_ops.c +++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c @@ -9,6 +9,7 @@ #define BATCH_ALLOC_SZ ROC_CN10K_NPA_BATCH_ALLOC_MAX_PTRS #define BATCH_OP_DATA_TABLE_MZ_NAME "batch_op_data_table_mz" +#define BATCH_ALLOC_WAIT_US 5 enum batch_op_status { BATCH_ALLOC_OP_NOT_ISSUED = 0, @@ -178,7 +179,7 @@ cn10k_mempool_get_count(const struct rte_mempool *mp) if (mem->status == BATCH_ALLOC_OP_ISSUED) count += roc_npa_aura_batch_alloc_count( - mem->objs, BATCH_ALLOC_SZ, 1); + mem->objs, BATCH_ALLOC_SZ, BATCH_ALLOC_WAIT_US); if (mem->status == BATCH_ALLOC_OP_DONE) count += mem->sz;