From patchwork Tue May 16 14:37:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavan Nikhilesh Bhagavatula X-Patchwork-Id: 126889 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5787E42B24; Tue, 16 May 2023 16:38:07 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1704941153; Tue, 16 May 2023 16:38:05 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 41E7C41153 for ; Tue, 16 May 2023 16:38:03 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34G7HUcl021183 for ; Tue, 16 May 2023 07:38:02 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=QQ6eYzxguq/xK738F55Eg5+202FkuWh0xWR8Op3dPZc=; b=X/d4jR0vitOVnokLu5qELiS5/CX34OkvNjELK4eanboxkxU+5JINIzKq6tFkEc9gF6Dd DPiKA2Arj0D4N0D8SmkSQHq9QUp4OFmlBPtoZFhJaEFSSjyJ7I2Et2xWey9dtd7eviRz hA1lOSjJJzqcqQYYLmTn6Bsv4JjrGqLw9VEV4ebVmOgvueH32VRrb+xaTsrRc72I2693 Gt4G3bnLJSGkEqBMLOEHPYdC1eT4np7amXoYH1cNVb+VGjo8ueE459hGEXTw8QtU9KXC WdKgK9ofbamIY0vXmGw/hYKhF9n5aI54yAaJPoB4EKbyFH+UXkhNtjYbLe2MHP/epIjt qQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qkvbmkrfc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 16 May 2023 07:38:01 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Tue, 16 May 2023 07:38:00 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Tue, 16 May 2023 07:37:59 -0700 Received: from MININT-80QBFE8.corp.innovium.com (unknown [10.28.164.122]) by maili.marvell.com (Postfix) with ESMTP id F3E5A3F706A; Tue, 16 May 2023 07:37:57 -0700 (PDT) From: To: , Pavan Nikhilesh , "Shijith Thotton" CC: Subject: [PATCH 2/3] event/cnxk: use local labels in asm intrinsic Date: Tue, 16 May 2023 20:07:51 +0530 Message-ID: <20230516143752.4941-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230516143752.4941-1-pbhagavatula@marvell.com> References: <20230516143752.4941-1-pbhagavatula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: jIAdrlmE0xkvxJ3fYV8H5lv2Zo51VIe_ X-Proofpoint-ORIG-GUID: jIAdrlmE0xkvxJ3fYV8H5lv2Zo51VIe_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-16_07,2023-05-16_01,2023-02-09_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Pavan Nikhilesh Using labels in asm generates them as regular function and shades callstack in tools like gdb or perf. Use local label instead for better visibility. Signed-off-by: Pavan Nikhilesh --- drivers/event/cnxk/cn10k_worker.h | 8 ++--- drivers/event/cnxk/cn9k_worker.h | 25 ++++++++-------- drivers/event/cnxk/cnxk_tim_worker.h | 44 ++++++++++++++-------------- drivers/event/cnxk/cnxk_worker.h | 8 ++--- 4 files changed, 43 insertions(+), 42 deletions(-) diff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h index 27d3a9bca2..6ec81a5ce5 100644 --- a/drivers/event/cnxk/cn10k_worker.h +++ b/drivers/event/cnxk/cn10k_worker.h @@ -268,12 +268,12 @@ cn10k_sso_hws_get_work_empty(struct cn10k_sso_hws *ws, struct rte_event *ev, #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldp %[tag], %[wqp], [%[tag_loc]] \n" - " tbz %[tag], 63, done%= \n" + " tbz %[tag], 63, .Ldone%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldp %[tag], %[wqp], [%[tag_loc]] \n" - " tbnz %[tag], 63, rty%= \n" - "done%=: dmb ld \n" + " tbnz %[tag], 63, .Lrty%= \n" + ".Ldone%=: dmb ld \n" : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]) : [tag_loc] "r"(ws->base + SSOW_LF_GWS_WQE0) : "memory"); diff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h index d15dd309fe..51b4db419e 100644 --- a/drivers/event/cnxk/cn9k_worker.h +++ b/drivers/event/cnxk/cn9k_worker.h @@ -232,18 +232,19 @@ cn9k_sso_hws_dual_get_work(uint64_t base, uint64_t pair_base, rte_prefetch_non_temporal(dws->lookup_mem); #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE - "rty%=: \n" + ".Lrty%=: \n" " ldr %[tag], [%[tag_loc]] \n" " ldr %[wqp], [%[wqp_loc]] \n" - " tbnz %[tag], 63, rty%= \n" - "done%=: str %[gw], [%[pong]] \n" + " tbnz %[tag], 63, .Lrty%= \n" + ".Ldone%=: str %[gw], [%[pong]] \n" " dmb ld \n" " sub %[mbuf], %[wqp], #0x80 \n" " prfm pldl1keep, [%[mbuf]] \n" : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]), [mbuf] "=&r"(mbuf) : [tag_loc] "r"(base + SSOW_LF_GWS_TAG), - [wqp_loc] "r"(base + SSOW_LF_GWS_WQP), [gw] "r"(dws->gw_wdata), + [wqp_loc] "r"(base + SSOW_LF_GWS_WQP), + [gw] "r"(dws->gw_wdata), [pong] "r"(pair_base + SSOW_LF_GWS_OP_GET_WORK0)); #else gw.u64[0] = plt_read64(base + SSOW_LF_GWS_TAG); @@ -282,13 +283,13 @@ cn9k_sso_hws_get_work(struct cn9k_sso_hws *ws, struct rte_event *ev, asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldr %[tag], [%[tag_loc]] \n" " ldr %[wqp], [%[wqp_loc]] \n" - " tbz %[tag], 63, done%= \n" + " tbz %[tag], 63, .Ldone%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldr %[tag], [%[tag_loc]] \n" " ldr %[wqp], [%[wqp_loc]] \n" - " tbnz %[tag], 63, rty%= \n" - "done%=: dmb ld \n" + " tbnz %[tag], 63, .Lrty%= \n" + ".Ldone%=: dmb ld \n" " sub %[mbuf], %[wqp], #0x80 \n" " prfm pldl1keep, [%[mbuf]] \n" : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]), @@ -330,13 +331,13 @@ cn9k_sso_hws_get_work_empty(uint64_t base, struct rte_event *ev, asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldr %[tag], [%[tag_loc]] \n" " ldr %[wqp], [%[wqp_loc]] \n" - " tbz %[tag], 63, done%= \n" + " tbz %[tag], 63, .Ldone%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldr %[tag], [%[tag_loc]] \n" " ldr %[wqp], [%[wqp_loc]] \n" - " tbnz %[tag], 63, rty%= \n" - "done%=: dmb ld \n" + " tbnz %[tag], 63, .Lrty%= \n" + ".Ldone%=: dmb ld \n" " sub %[mbuf], %[wqp], #0x80 \n" : [tag] "=&r"(gw.u64[0]), [wqp] "=&r"(gw.u64[1]), [mbuf] "=&r"(mbuf) diff --git a/drivers/event/cnxk/cnxk_tim_worker.h b/drivers/event/cnxk/cnxk_tim_worker.h index 8fafb8f09c..f0857f26ba 100644 --- a/drivers/event/cnxk/cnxk_tim_worker.h +++ b/drivers/event/cnxk/cnxk_tim_worker.h @@ -262,12 +262,12 @@ cnxk_tim_add_entry_sp(struct cnxk_tim_ring *const tim_ring, #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldxr %[hbt], [%[w1]] \n" - " tbz %[hbt], 33, dne%= \n" + " tbz %[hbt], 33, .Ldne%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldxr %[hbt], [%[w1]] \n" - " tbnz %[hbt], 33, rty%= \n" - "dne%=: \n" + " tbnz %[hbt], 33, .Lrty%=\n" + ".Ldne%=: \n" : [hbt] "=&r"(hbt_state) : [w1] "r"((&bkt->w1)) : "memory"); @@ -345,12 +345,12 @@ cnxk_tim_add_entry_mp(struct cnxk_tim_ring *const tim_ring, #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldxr %[hbt], [%[w1]] \n" - " tbz %[hbt], 33, dne%= \n" + " tbz %[hbt], 33, .Ldne%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldxr %[hbt], [%[w1]] \n" - " tbnz %[hbt], 33, rty%= \n" - "dne%=: \n" + " tbnz %[hbt], 33, .Lrty%=\n" + ".Ldne%=: \n" : [hbt] "=&r"(hbt_state) : [w1] "r"((&bkt->w1)) : "memory"); @@ -374,13 +374,13 @@ cnxk_tim_add_entry_mp(struct cnxk_tim_ring *const tim_ring, cnxk_tim_bkt_dec_lock(bkt); #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE - " ldxr %[rem], [%[crem]] \n" - " tbz %[rem], 63, dne%= \n" + " ldxr %[rem], [%[crem]] \n" + " tbz %[rem], 63, .Ldne%= \n" " sevl \n" - "rty%=: wfe \n" - " ldxr %[rem], [%[crem]] \n" - " tbnz %[rem], 63, rty%= \n" - "dne%=: \n" + ".Lrty%=: wfe \n" + " ldxr %[rem], [%[crem]] \n" + " tbnz %[rem], 63, .Lrty%= \n" + ".Ldne%=: \n" : [rem] "=&r"(rem) : [crem] "r"(&bkt->w1) : "memory"); @@ -478,12 +478,12 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, #ifdef RTE_ARCH_ARM64 asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldxr %[hbt], [%[w1]] \n" - " tbz %[hbt], 33, dne%= \n" + " tbz %[hbt], 33, .Ldne%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldxr %[hbt], [%[w1]] \n" - " tbnz %[hbt], 33, rty%= \n" - "dne%=: \n" + " tbnz %[hbt], 33, .Lrty%=\n" + ".Ldne%=: \n" : [hbt] "=&r"(hbt_state) : [w1] "r"((&bkt->w1)) : "memory"); @@ -510,13 +510,13 @@ cnxk_tim_add_entry_brst(struct cnxk_tim_ring *const tim_ring, asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldxrb %w[lock_cnt], [%[lock]] \n" " tst %w[lock_cnt], 255 \n" - " beq dne%= \n" + " beq .Ldne%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldxrb %w[lock_cnt], [%[lock]] \n" " tst %w[lock_cnt], 255 \n" - " bne rty%= \n" - "dne%=: \n" + " bne .Lrty%= \n" + ".Ldne%=: \n" : [lock_cnt] "=&r"(lock_cnt) : [lock] "r"(&bkt->lock) : "memory"); diff --git a/drivers/event/cnxk/cnxk_worker.h b/drivers/event/cnxk/cnxk_worker.h index 22d90afba2..2bd41f8a5e 100644 --- a/drivers/event/cnxk/cnxk_worker.h +++ b/drivers/event/cnxk/cnxk_worker.h @@ -71,12 +71,12 @@ cnxk_sso_hws_swtag_wait(uintptr_t tag_op) asm volatile(PLT_CPU_FEATURE_PREAMBLE " ldr %[swtb], [%[swtp_loc]] \n" - " tbz %[swtb], 62, done%= \n" + " tbz %[swtb], 62, .Ldone%= \n" " sevl \n" - "rty%=: wfe \n" + ".Lrty%=: wfe \n" " ldr %[swtb], [%[swtp_loc]] \n" - " tbnz %[swtb], 62, rty%= \n" - "done%=: \n" + " tbnz %[swtb], 62, .Lrty%= \n" + ".Ldone%=: \n" : [swtb] "=&r"(swtp) : [swtp_loc] "r"(tag_op)); #else