From patchwork Tue May 16 06:37:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Baum X-Patchwork-Id: 126872 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BFF6E42B1F; Tue, 16 May 2023 08:38:49 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C73BE42D88; Tue, 16 May 2023 08:38:20 +0200 (CEST) Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2077.outbound.protection.outlook.com [40.107.102.77]) by mails.dpdk.org (Postfix) with ESMTP id C70F642D47 for ; Tue, 16 May 2023 08:38:18 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BrSwaqCOljT73trOggg3f5SePXgW4kuHAcGmUkB4mbBN23iNtEoX/pQj4E/A9N0Lgwy9BFb0Gl1W81nWHYQgGPsKs1XVAnQP1hCy0kiNKTZi7qIRHKnTdAt6uE5FqtVWJr4ogrK75c6nFym0BlKq8tj9ePlsGwaQTjRY66L9xsXWMYTgXABfOzG58mw1myiR0yCxbyY8fbYCSFME7Ja78j5ocVwOqIRXwGI4Kpjwa4ZEysfTOHQblz/GKuQ5Nh8GgqfXb5AjmhFvrKKUMVgyFrCsiOmqOutJPbB2VNn+Id5uzP45pTGcSGgDo9GaJO08zcY42aaXbV/5/tsldW0EIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=yq613IPiI3VvhJCWbbJ13LLrqXW8B83Q1NW/HQJ4Crs=; b=hoMq/ZHK64LIJnsOfdVk9NTgN52GN5ZI3ifp3vFwrVt1RsEiZ3jxe6amDnlwjifUGsyR3nk+sUQbSIAa0TzqXFFxbq2XaGvAwHpvJgSDJ7Lt1EdqtMNvurqljpjzsa0qnvcF18lvZjwl7J2uJ21XDFn1ScZcNDS1oHe3BdLorOSlSYdaU4xvogqyz2S4QLn1YKPsdUmIs8HsK66SEMBC0oHmfslI09U+7WMtfKj/53eZMOdMT2Gp+d60+uBqu3ktYkLOw/MOIxKyp2bRc5pdmBSoENrQpQWW//27+wDdv5PqJ9+vU9PdZuViXgItsHES1WN99rVnlcbClgi7OgAtdg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=yq613IPiI3VvhJCWbbJ13LLrqXW8B83Q1NW/HQJ4Crs=; b=ZJgtklstrWN04zJtqRZcrhUKr/HvoYby/pa74C37VBFR3JHcLzM/bANNlXr3aSSMQseLX07pXZsRmFd668mTICZ4/2lgxDEww4GwoWyOgJxd2GjAALkTZ8RO8mJmaQQEKb6p8UPRf/QVlgsqKHXsOm0OOzL3nqLy3YKUKp0czku6LocKiFEoBe3WZT/5La3uF8HkfFM4lgPFHRr2RTkjUlM1ilk/+/h2igtuaAqO/9qzzjF4Ycn/KEw72ZNuHIuKnAiA6BFF3VSlMz0cxgQnyOwxhsKcgB3JqsYdweEbJWqGsqQg2vnkHqvTMTHuVlOL7xLmzQbuzPQcpy5Vsstsxw== Received: from MW4PR03CA0057.namprd03.prod.outlook.com (2603:10b6:303:8e::32) by CY8PR12MB8315.namprd12.prod.outlook.com (2603:10b6:930:7e::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6387.33; Tue, 16 May 2023 06:38:17 +0000 Received: from CO1NAM11FT060.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8e:cafe::3d) by MW4PR03CA0057.outlook.office365.com (2603:10b6:303:8e::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6387.30 via Frontend Transport; Tue, 16 May 2023 06:38:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CO1NAM11FT060.mail.protection.outlook.com (10.13.175.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6411.15 via Frontend Transport; Tue, 16 May 2023 06:38:16 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Mon, 15 May 2023 23:38:10 -0700 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Mon, 15 May 2023 23:38:10 -0700 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37 via Frontend Transport; Mon, 15 May 2023 23:38:08 -0700 From: Michael Baum To: CC: Ori Kam , Aman Singh , "Yuying Zhang" , Ferruh Yigit , "Thomas Monjalon" Subject: [PATCH v1 7/7] net/mlx5: add MPLS modify field support Date: Tue, 16 May 2023 09:37:47 +0300 Message-ID: <20230516063747.3047758-8-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230516063747.3047758-1-michaelba@nvidia.com> References: <20230516063747.3047758-1-michaelba@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT060:EE_|CY8PR12MB8315:EE_ X-MS-Office365-Filtering-Correlation-Id: 641f53af-f06b-4ee4-ac85-08db55d821c3 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: S8B7OfGc8jQOlQYCzv5pTToeJMPP44OBFqOBuuWoMi5eP3ofKKjfz+phZl+UfNlNDq2xgfvTkNKFDCJwCN9WMC9BcLYgQDvyFMoZullrwutknaFvzDwNvtC9jnvgfqyAoJVhwmQ4h12QFO0q272UO9CFaME98criuSIFigGs3diNV/PeFVcFtTjvvDfb+uiDVn0tg/upeq9qklJA1MwObVcXSIRECJXOdvQDPxn0esufLrFSzdh5g+mA6lat8/S9ppriPXTmhFQoSZrXLJrahRpOvALx1VIQ5GQL1r77g9la/VYVoNsTx17dMSWZQUkxaaCHWpFukFtoSrP+UBJb39O8K6QJE3WXQAIynxe971RVsoYZr7bcmROdXloTCMLzgFc/LLhnuk9c3KhiKNqnml7PUmPttYgga1jiCeInLyfhxdCnpbo28JJ5OZmlpATetwrQ2s0LA62y7eLrV22z7eYWAZ4V63weEY7ae6GrsTxvn4xa8IDsjuISuz/6wkGpwTyQbBzBCVEkR8q8hArrCpnuV5asmuI8ZNL9Fm7vsx+muFFBssn1JYniu1pR1cb7vFxnvVbW+i0mSGlete+zTIX9HC4KzEb4C7VeXwmCtsxEzOJCMoJzduQDMeLiHzH8ZNV8n0r4XNNUcYoEh1dMK/37G8Ant5E6P7I8hsVAFIOcmixa6S5WfoRGI4dVVCpzrbfmucKaGkgKeCBRNBrJQ8WB8iVd0girUZnnBSOECOZxEy7wnKisEJ2abZp81/TJ X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230028)(4636009)(396003)(346002)(39860400002)(136003)(376002)(451199021)(46966006)(40470700004)(36840700001)(36756003)(86362001)(54906003)(316002)(4326008)(70586007)(70206006)(6916009)(478600001)(7696005)(6666004)(40480700001)(55016003)(82310400005)(8936002)(8676002)(5660300002)(41300700001)(2906002)(7636003)(356005)(82740400003)(336012)(2616005)(1076003)(26005)(426003)(6286002)(186003)(36860700001)(83380400001)(47076005)(40460700003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 May 2023 06:38:16.9888 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 641f53af-f06b-4ee4-ac85-08db55d821c3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT060.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8315 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add support for modify field in tunnel MPLS header. For now it is supported only to copy from. Signed-off-by: Michael Baum --- drivers/common/mlx5/mlx5_prm.h | 5 +++++ drivers/net/mlx5/mlx5_flow_dv.c | 23 +++++++++++++++++++++++ drivers/net/mlx5/mlx5_flow_hw.c | 16 +++++++++------- 3 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index ed3d5efbb7..04c1400a1e 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -787,6 +787,11 @@ enum mlx5_modification_field { MLX5_MODI_TUNNEL_HDR_DW_1 = 0x75, MLX5_MODI_GTPU_FIRST_EXT_DW_0 = 0x76, MLX5_MODI_HASH_RESULT = 0x81, + MLX5_MODI_IN_MPLS_LABEL_0 = 0x8a, + MLX5_MODI_IN_MPLS_LABEL_1, + MLX5_MODI_IN_MPLS_LABEL_2, + MLX5_MODI_IN_MPLS_LABEL_3, + MLX5_MODI_IN_MPLS_LABEL_4, MLX5_MODI_OUT_IPV6_NEXT_HDR = 0x4A, MLX5_MODI_INVALID = INT_MAX, }; diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index f136f43b0a..93cce16a1e 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -1388,6 +1388,7 @@ mlx5_flow_item_field_width(struct rte_eth_dev *dev, case RTE_FLOW_FIELD_GENEVE_VNI: return 24; case RTE_FLOW_FIELD_GTP_TEID: + case RTE_FLOW_FIELD_MPLS: case RTE_FLOW_FIELD_TAG: return 32; case RTE_FLOW_FIELD_MARK: @@ -1435,6 +1436,12 @@ flow_modify_info_mask_32_masked(uint32_t length, uint32_t off, uint32_t post_mas return rte_cpu_to_be_32(mask & post_mask); } +static __rte_always_inline enum mlx5_modification_field +mlx5_mpls_modi_field_get(const struct rte_flow_action_modify_data *data) +{ + return MLX5_MODI_IN_MPLS_LABEL_0 + data->sub_level; +} + static void mlx5_modify_flex_item(const struct rte_eth_dev *dev, const struct mlx5_flex_item *flex, @@ -1893,6 +1900,16 @@ mlx5_flow_field_id_to_modify_info else info[idx].offset = off_be; break; + case RTE_FLOW_FIELD_MPLS: + MLX5_ASSERT(data->offset + width <= 32); + off_be = 32 - (data->offset + width); + info[idx] = (struct field_modify_info){4, 0, + mlx5_mpls_modi_field_get(data)}; + if (mask) + mask[idx] = flow_modify_info_mask_32(width, off_be); + else + info[idx].offset = off_be; + break; case RTE_FLOW_FIELD_TAG: { MLX5_ASSERT(data->offset + width <= 32); @@ -5344,6 +5361,12 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifications of the GENEVE Network" " Identifier is not supported"); + if (action_modify_field->dst.field == RTE_FLOW_FIELD_MPLS || + action_modify_field->src.field == RTE_FLOW_FIELD_MPLS) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of the MPLS header " + "is not supported"); if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK || action_modify_field->src.field == RTE_FLOW_FIELD_MARK) if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 1b68a19900..80e6398992 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -3546,10 +3546,8 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action, const struct rte_flow_action *mask, struct rte_flow_error *error) { - const struct rte_flow_action_modify_field *action_conf = - action->conf; - const struct rte_flow_action_modify_field *mask_conf = - mask->conf; + const struct rte_flow_action_modify_field *action_conf = action->conf; + const struct rte_flow_action_modify_field *mask_conf = mask->conf; if (action_conf->operation != mask_conf->operation) return rte_flow_error_set(error, EINVAL, @@ -3604,6 +3602,11 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying Geneve VNI is not supported"); + /* Due to HW bug, tunnel MPLS header is read only. */ + if (action_conf->dst.field == RTE_FLOW_FIELD_MPLS) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "MPLS cannot be used as destination"); return 0; } @@ -4134,9 +4137,8 @@ mlx5_flow_hw_actions_validate(struct rte_eth_dev *dev, action_flags |= MLX5_FLOW_ACTION_METER; break; case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: - ret = flow_hw_validate_action_modify_field(action, - mask, - error); + ret = flow_hw_validate_action_modify_field(action, mask, + error); if (ret < 0) return ret; action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;