diff mbox series

[v3,3/5] common/mlx5: update MTR ASO definitions

Message ID 20230507073952.4061-4-getelson@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series net/mlx5: support indirect quota flow action |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Gregory Etelson May 7, 2023, 7:39 a.m. UTC 
  Update MTR ASO definitions for QUOTA flow action.
Quota flow action requires WQE READ capability and access to
token fields.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index ed3d5efbb7..9ba3c5d008 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -3949,6 +3949,8 @@  enum mlx5_aso_op {
 	ASO_OPER_LOGICAL_OR = 0x1,
 };
 
+#define MLX5_ASO_CSEG_READ_ENABLE 1
+
 /* ASO WQE CTRL segment. */
 struct mlx5_aso_cseg {
 	uint32_t va_h;
@@ -3963,6 +3965,8 @@  struct mlx5_aso_cseg {
 	uint64_t data_mask;
 } __rte_packed;
 
+#define MLX5_MTR_MAX_TOKEN_VALUE INT32_MAX
+
 /* A meter data segment - 2 per ASO WQE. */
 struct mlx5_aso_mtr_dseg {
 	uint32_t v_bo_sc_bbog_mm;