@@ -531,6 +531,11 @@ enum index {
ITEM_QUOTA_STATE_NAME,
ITEM_PORT_AFFINITY,
ITEM_PORT_AFFINITY_VALUE,
+ ITEM_IB_BTH,
+ ITEM_IB_BTH_OPCODE,
+ ITEM_IB_BTH_PKEY,
+ ITEM_IB_BTH_DST_QPN,
+ ITEM_IB_BTH_PSN,
/* Validate/create actions. */
ACTIONS,
@@ -1517,6 +1522,7 @@ static const enum index next_item[] = {
ITEM_QUOTA,
ITEM_PORT_AFFINITY,
ITEM_IPSEC_SYNDROME,
+ ITEM_IB_BTH,
END_SET,
ZERO,
};
@@ -2025,6 +2031,15 @@ static const enum index item_ipsec_syndrome[] = {
ZERO,
};
+static const enum index item_ib_bth[] = {
+ ITEM_IB_BTH_OPCODE,
+ ITEM_IB_BTH_PKEY,
+ ITEM_IB_BTH_DST_QPN,
+ ITEM_IB_BTH_PSN,
+ ITEM_NEXT,
+ ZERO,
+};
+
static const enum index next_action[] = {
ACTION_END,
ACTION_VOID,
@@ -5750,6 +5765,46 @@ static const struct token token_list[] = {
.args = ARGS(ARGS_ENTRY(struct mlx5_flow_item_ipsec_syndrome,
syndrome)),
},
+ [ITEM_IB_BTH] = {
+ .name = "ib_bth",
+ .help = "match ib bth fields",
+ .priv = PRIV_ITEM(IB_BTH,
+ sizeof(struct rte_flow_item_ib_bth)),
+ .next = NEXT(item_ib_bth),
+ .call = parse_vc,
+ },
+ [ITEM_IB_BTH_OPCODE] = {
+ .name = "opcode",
+ .help = "match ib bth opcode",
+ .next = NEXT(item_ib_bth, NEXT_ENTRY(COMMON_UNSIGNED),
+ item_param),
+ .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_ib_bth,
+ hdr.opcode)),
+ },
+ [ITEM_IB_BTH_PKEY] = {
+ .name = "pkey",
+ .help = "partition key",
+ .next = NEXT(item_ib_bth, NEXT_ENTRY(COMMON_UNSIGNED),
+ item_param),
+ .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_ib_bth,
+ hdr.pkey)),
+ },
+ [ITEM_IB_BTH_DST_QPN] = {
+ .name = "dst_qp",
+ .help = "destination qp",
+ .next = NEXT(item_ib_bth, NEXT_ENTRY(COMMON_UNSIGNED),
+ item_param),
+ .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_ib_bth,
+ hdr.dst_qp)),
+ },
+ [ITEM_IB_BTH_PSN] = {
+ .name = "psn",
+ .help = "packet sequence number",
+ .next = NEXT(item_ib_bth, NEXT_ENTRY(COMMON_UNSIGNED),
+ item_param),
+ .args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_ib_bth,
+ hdr.psn)),
+ },
/* Validate/create actions. */
[ACTIONS] = {
.name = "actions",
@@ -12634,6 +12689,9 @@ flow_item_default_mask(const struct rte_flow_item *item)
case RTE_FLOW_ITEM_TYPE_IPV6_ROUTING_EXT:
mask = &ipv6_routing_ext_default_mask;
break;
+ case RTE_FLOW_ITEM_TYPE_IB_BTH:
+ mask = &rte_flow_item_ib_bth_mask;
+ break;
default:
break;
}
@@ -103,6 +103,7 @@ gtpc =
gtpu =
gtp_psc =
higig2 =
+ib_bth =
icmp =
icmp6 =
icmp6_nd_na =
@@ -1574,6 +1574,13 @@ Matches ipv6 routing extension header.
- ``type``: IPv6 routing extension header type.
- ``segments_left``: How many IPv6 destination addresses carries on
+Item: ``IB_BTH``
+^^^^^^^^^^^^^^^^
+
+Matches an InfiniBand base transport header in RoCE packet.
+
+- ``hdr``: InfiniBand base transport header definition (``rte_ib.h``).
+
Actions
~~~~~~~
@@ -3741,6 +3741,12 @@ This section lists supported pattern items and their attributes, if any.
- ``send_to_kernel``: send packets to kernel.
+- ``ib_bth``: match InfiniBand BTH(base transport header).
+
+ - ``opcode {unsigned}``: Opcode.
+ - ``pkey {unsigned}``: Partition key.
+ - ``dst_qp {unsigned}``: Destination Queue Pair.
+ - ``psn {unsigned}``: Packet Sequence Number.
Actions list
^^^^^^^^^^^^
@@ -179,6 +179,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = {
MK_FLOW_ITEM(PORT_AFFINITY, sizeof(struct rte_flow_item_port_affinity)),
MK_FLOW_ITEM_FN(IPV6_ROUTING_EXT, sizeof(struct rte_flow_item_ipv6_routing_ext),
rte_flow_item_ipv6_routing_ext_conv),
+ MK_FLOW_ITEM(IB_BTH, sizeof(struct rte_flow_item_ib_bth)),
};
/** Generate flow_action[] entry. */
@@ -38,6 +38,7 @@
#include <rte_ppp.h>
#include <rte_gre.h>
#include <rte_macsec.h>
+#include <rte_ib.h>
#ifdef __cplusplus
extern "C" {
@@ -691,6 +692,13 @@ enum rte_flow_item_type {
* See struct rte_flow_item_ipv6_routing_ext.
*/
RTE_FLOW_ITEM_TYPE_IPV6_ROUTING_EXT,
+
+ /**
+ * Matches an InfiniBand base transport header in RoCE packet.
+ *
+ * See struct rte_flow_item_ib_bth.
+ */
+ RTE_FLOW_ITEM_TYPE_IB_BTH,
};
/**
@@ -2284,6 +2292,25 @@ rte_flow_item_port_affinity_mask = {
};
#endif
+/**
+ * RTE_FLOW_ITEM_TYPE_IB_BTH.
+ *
+ * Matches an InfiniBand base transport header in RoCE packet.
+ */
+struct rte_flow_item_ib_bth {
+ struct rte_ib_bth hdr; /**< InfiniBand base transport header definition. */
+};
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_IB_BTH. */
+#ifndef __cplusplus
+static const struct rte_flow_item_ib_bth rte_flow_item_ib_bth_mask = {
+ .hdr = {
+ .opcode = 0xff,
+ .dst_qp = "\xff\xff\xff",
+ },
+};
+#endif
+
/**
* Action types.
*
new file mode 100644
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2023 NVIDIA Corporation & Affiliates
+ */
+
+#ifndef RTE_IB_H
+#define RTE_IB_H
+
+/**
+ * @file
+ *
+ * InfiniBand headers definitions
+ *
+ * The infiniBand headers are used by RoCE (RDMA over Converged Ethernet).
+ */
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * InfiniBand Base Transport Header according to
+ * IB Specification Vol 1-Release-1.4.
+ */
+__extension__
+struct rte_ib_bth {
+ uint8_t opcode; /**< Opcode. */
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t tver:4; /**< Transport Header Version. */
+ uint8_t padcnt:2; /**< Pad Count. */
+ uint8_t m:1; /**< MigReq. */
+ uint8_t se:1; /**< Solicited Event. */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t se:1; /**< Solicited Event. */
+ uint8_t m:1; /**< MigReq. */
+ uint8_t padcnt:2; /**< Pad Count. */
+ uint8_t tver:4; /**< Transport Header Version. */
+#endif
+ rte_be16_t pkey; /**< Partition key. */
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t rsvd0:6; /**< Reserved. */
+ uint8_t b:1; /**< BECN. */
+ uint8_t f:1; /**< FECN. */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t f:1; /**< FECN. */
+ uint8_t b:1; /**< BECN. */
+ uint8_t rsvd0:6; /**< Reserved. */
+#endif
+ uint8_t dst_qp[3]; /**< Destination QP */
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+ uint8_t rsvd1:7; /**< Reserved. */
+ uint8_t a:1; /**< Acknowledge Request. */
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+ uint8_t a:1; /**< Acknowledge Request. */
+ uint8_t rsvd1:7; /**< Reserved. */
+#endif
+ uint8_t psn[3]; /**< Packet Sequence Number */
+} __rte_packed;
+
+/** RoCEv2 default port. */
+#define RTE_ROCEV2_DEFAULT_PORT 4791
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RTE_IB_H */