diff mbox series

regex/mlx5: utilize all available QPs

Message ID 20230221074728.1486004-1-ggribbon@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series regex/mlx5: utilize all available QPs |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
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ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
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ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Gerry Gribbon Feb. 21, 2023, 7:47 a.m. UTC 
  Fix overflow of free QP mask.
Regex used 64 QPs and used a bitmask to select a free QP for use.
The bitmask in use was only 32 bits so did not allow half of the QPs
to be utilised.
Upgraded to 64 bit mask and using ffsll now instead of ffs.

Fixes: 270032608503 ("regex/mlx5: refactor HW queue objects")
Cc: stable@dpdk.org

Signed-off-by: Gerry Gribbon <ggribbon@nvidia.com>
---
 drivers/regex/mlx5/mlx5_regex.h          |  2 +-
 drivers/regex/mlx5/mlx5_regex_fastpath.c | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

Comments

Thomas Monjalon March 10, 2023, 6:02 p.m. UTC | #1 
21/02/2023 08:47, Gerry Gribbon:
> Fix overflow of free QP mask.
> Regex used 64 QPs and used a bitmask to select a free QP for use.
> The bitmask in use was only 32 bits so did not allow half of the QPs
> to be utilised.
> Upgraded to 64 bit mask and using ffsll now instead of ffs.
> 
> Fixes: 270032608503 ("regex/mlx5: refactor HW queue objects")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Gerry Gribbon <ggribbon@nvidia.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/drivers/regex/mlx5/mlx5_regex.h b/drivers/regex/mlx5/mlx5_regex.h
index b8554fd1cf..481f6fc59f 100644
--- a/drivers/regex/mlx5/mlx5_regex.h
+++ b/drivers/regex/mlx5/mlx5_regex.h
@@ -37,7 +37,7 @@  struct mlx5_regex_qp {
 	struct mlx5_regex_hw_qp *qps; /* Pointer to qp array. */
 	uint16_t nb_obj; /* Number of qp objects. */
 	struct mlx5_regex_cq cq; /* CQ struct. */
-	uint32_t free_qps;
+	uint64_t free_qps;
 	struct mlx5_regex_job *jobs;
 	struct ibv_mr *metadata;
 	struct ibv_mr *outputs;
diff --git a/drivers/regex/mlx5/mlx5_regex_fastpath.c b/drivers/regex/mlx5/mlx5_regex_fastpath.c
index 143c7d7cdf..6c87afa923 100644
--- a/drivers/regex/mlx5/mlx5_regex_fastpath.c
+++ b/drivers/regex/mlx5/mlx5_regex_fastpath.c
@@ -417,7 +417,7 @@  mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
 		return 0;
 #endif
 
-	while ((hw_qpid = ffs(queue->free_qps))) {
+	while ((hw_qpid = ffsll(queue->free_qps))) {
 		hw_qpid--; /* ffs returns 1 for bit 0 */
 		qp_obj = &queue->qps[hw_qpid];
 		nb_desc = get_free(qp_obj, priv->has_umr);
@@ -426,7 +426,7 @@  mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
 			if (nb_desc > nb_left)
 				nb_desc = nb_left;
 			else
-				queue->free_qps &= ~(1 << hw_qpid);
+				queue->free_qps &= ~(1ULL << hw_qpid);
 			prep_regex_umr_wqe_set(priv, queue, qp_obj, ops,
 				nb_desc);
 			send_doorbell(priv, qp_obj);
@@ -456,7 +456,7 @@  mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
 		return 0;
 #endif
 
-	while ((hw_qpid = ffs(queue->free_qps))) {
+	while ((hw_qpid = ffsll(queue->free_qps))) {
 		hw_qpid--; /* ffs returns 1 for bit 0 */
 		qp_obj = &queue->qps[hw_qpid];
 		while (get_free(qp_obj, priv->has_umr)) {
@@ -470,7 +470,7 @@  mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
 				goto out;
 			}
 		}
-		queue->free_qps &= ~(1 << hw_qpid);
+		queue->free_qps &= ~(1ULL << hw_qpid);
 		send_doorbell(priv, qp_obj);
 	}
 
@@ -603,7 +603,7 @@  mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id,
 		cq->ci = (cq->ci + 1) & 0xffffff;
 		rte_wmb();
 		cq->cq_obj.db_rec[0] = rte_cpu_to_be_32(cq->ci);
-		queue->free_qps |= (1 << hw_qpid);
+		queue->free_qps |= (1ULL << hw_qpid);
 	}
 
 out:
@@ -642,7 +642,7 @@  setup_qps(struct mlx5_regex_priv *priv, struct mlx5_regex_qp *queue)
 				     (uintptr_t)job->output);
 			wqe += 64;
 		}
-		queue->free_qps |= 1 << hw_qpid;
+		queue->free_qps |= 1ULL << hw_qpid;
 	}
 }