[v2] doc: update ark guide
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Commit Message
Add ark PCIe device 1d6c:1022 FX2 to pci_id_ark_map.
Include introduced FX2 PCIe ID and description.
Signed-off-by: Shepard Siegel <shepard.siegel@atomicrules.com>
---
doc/guides/nics/ark.rst | 20 ++++++++++++++++++++
drivers/net/ark/ark_ethdev.c | 1 +
2 files changed, 21 insertions(+)
Comments
On 2/10/2023 10:35 PM, Shepard Siegel wrote:
> Add ark PCIe device 1d6c:1022 FX2 to pci_id_ark_map.
> Include introduced FX2 PCIe ID and description.
>
Thanks for v2, but this is no more just a documentation patch,
can you please split the patch into two,
first one adds new device support and update documentation related to
new device, with a 'net/ark:' title,
second one updates the document for extended information which is most
of this patch
> Signed-off-by: Shepard Siegel <shepard.siegel@atomicrules.com>
> ---
> doc/guides/nics/ark.rst | 20 ++++++++++++++++++++
> drivers/net/ark/ark_ethdev.c | 1 +
> 2 files changed, 21 insertions(+)
>
> diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst
> index ba00f14e80..39cd75064d 100644
> --- a/doc/guides/nics/ark.rst
> +++ b/doc/guides/nics/ark.rst
> @@ -52,6 +52,10 @@ board. While specific capabilities such as number of physical
> hardware queue-pairs are negotiated; the driver is designed to
> remain constant over a broad and extendable feature set.
>
> +* FPGA Vendors Supported: AMD/Xilinx and Intel
> +* Number of RX/TX Queue-Pairs: up to 128
> +* PCIe Endpoint Technology: Gen3, Gen4, Gen5
> +
> Intentionally, Arkville by itself DOES NOT provide common NIC
> capabilities such as offload or receive-side scaling (RSS).
> These capabilities would be viewed as a gate-level "tax" on
> @@ -302,6 +306,20 @@ ARK PMD supports the following Arkville RTL PCIe instances including:
> * ``1d6c:101c`` - AR-ARK-SRIOV-VF [Arkville Virtual Function]
> * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile]
> * ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
> +* ``1d6c:1022`` - AR-ARKA-FX2 [Arkville 128B DPDK Data Mover for Agilex]
> +
> +Arkville RTL Core Configurations
> +-------------------------------------
> +
> +Arkville's RTL core may be configured by the user for three different
> +datapath widths to balance throughput against FPGA logic area. The ARK PMD
> +has introspection on the RTL core configuration and acts accordingly.
> +All three configurations present identical RTL user-facing AXI stream
> +interfaces for both AMD/Xilinx and Intel FPGAs.
> +
> +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
> +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
> +* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only)
>
> DPDK and Arkville Firmware Versioning
> -------------------------------------
> @@ -334,6 +352,8 @@ Supported Features
> ------------------
>
> * Dynamic ARK PMD extensions
> +* Dynamic per-queue MBUF (re)sizing up to 32KB
> +* SR-IOV, VF-based queue-segregation
> * Multiple receive and transmit queues
> * Jumbo frames up to 9K
> * Hardware Statistics
> diff --git a/drivers/net/ark/ark_ethdev.c b/drivers/net/ark/ark_ethdev.c
> index c654a229f7..b2995427c8 100644
> --- a/drivers/net/ark/ark_ethdev.c
> +++ b/drivers/net/ark/ark_ethdev.c
> @@ -99,6 +99,7 @@ static const struct rte_pci_id pci_id_ark_map[] = {
> {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101c)},
> {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101e)},
> {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101f)},
> + {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x1022)},
> {.vendor_id = 0, /* sentinel */ },
> };
>
Thank you Ferruh,
I understand now.
We will abandon this patch and do exactly as you suggest with two
separate patches.
Thanks for your guidance. Look for the two patches ETA tomorrow.
-Shep
On Fri, Feb 10, 2023 at 5:56 PM Ferruh Yigit <ferruh.yigit@amd.com> wrote:
> On 2/10/2023 10:35 PM, Shepard Siegel wrote:
> > Add ark PCIe device 1d6c:1022 FX2 to pci_id_ark_map.
> > Include introduced FX2 PCIe ID and description.
> >
>
> Thanks for v2, but this is no more just a documentation patch,
> can you please split the patch into two,
> first one adds new device support and update documentation related to
> new device, with a 'net/ark:' title,
> second one updates the document for extended information which is most
> of this patch
>
>
> > Signed-off-by: Shepard Siegel <shepard.siegel@atomicrules.com>
> > ---
> > doc/guides/nics/ark.rst | 20 ++++++++++++++++++++
> > drivers/net/ark/ark_ethdev.c | 1 +
> > 2 files changed, 21 insertions(+)
> >
> > diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst
> > index ba00f14e80..39cd75064d 100644
> > --- a/doc/guides/nics/ark.rst
> > +++ b/doc/guides/nics/ark.rst
> > @@ -52,6 +52,10 @@ board. While specific capabilities such as number of
> physical
> > hardware queue-pairs are negotiated; the driver is designed to
> > remain constant over a broad and extendable feature set.
> >
> > +* FPGA Vendors Supported: AMD/Xilinx and Intel
> > +* Number of RX/TX Queue-Pairs: up to 128
> > +* PCIe Endpoint Technology: Gen3, Gen4, Gen5
> > +
> > Intentionally, Arkville by itself DOES NOT provide common NIC
> > capabilities such as offload or receive-side scaling (RSS).
> > These capabilities would be viewed as a gate-level "tax" on
> > @@ -302,6 +306,20 @@ ARK PMD supports the following Arkville RTL PCIe
> instances including:
> > * ``1d6c:101c`` - AR-ARK-SRIOV-VF [Arkville Virtual Function]
> > * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex
> R-Tile]
> > * ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
> > +* ``1d6c:1022`` - AR-ARKA-FX2 [Arkville 128B DPDK Data Mover for Agilex]
> > +
> > +Arkville RTL Core Configurations
> > +-------------------------------------
> > +
> > +Arkville's RTL core may be configured by the user for three different
> > +datapath widths to balance throughput against FPGA logic area. The ARK
> PMD
> > +has introspection on the RTL core configuration and acts accordingly.
> > +All three configurations present identical RTL user-facing AXI stream
> > +interfaces for both AMD/Xilinx and Intel FPGAs.
> > +
> > +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
> > +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
> > +* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only)
> >
> > DPDK and Arkville Firmware Versioning
> > -------------------------------------
> > @@ -334,6 +352,8 @@ Supported Features
> > ------------------
> >
> > * Dynamic ARK PMD extensions
> > +* Dynamic per-queue MBUF (re)sizing up to 32KB
> > +* SR-IOV, VF-based queue-segregation
> > * Multiple receive and transmit queues
> > * Jumbo frames up to 9K
> > * Hardware Statistics
> > diff --git a/drivers/net/ark/ark_ethdev.c b/drivers/net/ark/ark_ethdev.c
> > index c654a229f7..b2995427c8 100644
> > --- a/drivers/net/ark/ark_ethdev.c
> > +++ b/drivers/net/ark/ark_ethdev.c
> > @@ -99,6 +99,7 @@ static const struct rte_pci_id pci_id_ark_map[] = {
> > {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101c)},
> > {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101e)},
> > {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101f)},
> > + {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x1022)},
> > {.vendor_id = 0, /* sentinel */ },
> > };
> >
>
>
@@ -52,6 +52,10 @@ board. While specific capabilities such as number of physical
hardware queue-pairs are negotiated; the driver is designed to
remain constant over a broad and extendable feature set.
+* FPGA Vendors Supported: AMD/Xilinx and Intel
+* Number of RX/TX Queue-Pairs: up to 128
+* PCIe Endpoint Technology: Gen3, Gen4, Gen5
+
Intentionally, Arkville by itself DOES NOT provide common NIC
capabilities such as offload or receive-side scaling (RSS).
These capabilities would be viewed as a gate-level "tax" on
@@ -302,6 +306,20 @@ ARK PMD supports the following Arkville RTL PCIe instances including:
* ``1d6c:101c`` - AR-ARK-SRIOV-VF [Arkville Virtual Function]
* ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile]
* ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
+* ``1d6c:1022`` - AR-ARKA-FX2 [Arkville 128B DPDK Data Mover for Agilex]
+
+Arkville RTL Core Configurations
+-------------------------------------
+
+Arkville's RTL core may be configured by the user for three different
+datapath widths to balance throughput against FPGA logic area. The ARK PMD
+has introspection on the RTL core configuration and acts accordingly.
+All three configurations present identical RTL user-facing AXI stream
+interfaces for both AMD/Xilinx and Intel FPGAs.
+
+* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
+* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
+* ARK-FX2 - 1024-bit 128B datapath (PCIe Gen5x16 Only)
DPDK and Arkville Firmware Versioning
-------------------------------------
@@ -334,6 +352,8 @@ Supported Features
------------------
* Dynamic ARK PMD extensions
+* Dynamic per-queue MBUF (re)sizing up to 32KB
+* SR-IOV, VF-based queue-segregation
* Multiple receive and transmit queues
* Jumbo frames up to 9K
* Hardware Statistics
@@ -99,6 +99,7 @@ static const struct rte_pci_id pci_id_ark_map[] = {
{RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101c)},
{RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101e)},
{RTE_PCI_DEVICE(AR_VENDOR_ID, 0x101f)},
+ {RTE_PCI_DEVICE(AR_VENDOR_ID, 0x1022)},
{.vendor_id = 0, /* sentinel */ },
};