From patchwork Fri Feb 10 17:58:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chautru, Nicolas" X-Patchwork-Id: 123707 X-Patchwork-Delegate: maxime.coquelin@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AB52D41C50; Fri, 10 Feb 2023 19:03:45 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8339542D69; Fri, 10 Feb 2023 19:02:57 +0100 (CET) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mails.dpdk.org (Postfix) with ESMTP id E4AC642D12; Fri, 10 Feb 2023 19:02:46 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676052168; x=1707588168; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=J4jxVhvIW8uPqNat4UaV9kC2Rv6PwpYwVGjH8IvO8YY=; b=DTU0a6pfev9MUm5zcfwn6keAuQnUy3rCl9TPZBC5E6L1j//qRvsJhmwf 8FLrVNn3sdohBcDQ5dVFhHFaODndwPWDdjM9Cx8AsIRDYVPf/0DGVVx4L els1fRLhTPWNsCzRkbK483IuOxAbHbGqVoLbPe8Ao9iHJy27GFdoZ92Ms z+Lx53vDeExrRJyIdnkglqp+69I9xL8CberqHUMlGovDzN93OYS6VUNRH wFmbXyANt+yeidJcE3TC2tuJwsa+GEHJC+uPq6I+himHC+7143cuE2IbF L1j6ttxu2mQF2PTr+kR/WVF90eZkEb6Qa70yPiaGOvlQZjF54ZmUFh1yV g==; X-IronPort-AV: E=McAfee;i="6500,9779,10617"; a="310117920" X-IronPort-AV: E=Sophos;i="5.97,287,1669104000"; d="scan'208";a="310117920" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Feb 2023 10:02:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10617"; a="670076725" X-IronPort-AV: E=Sophos;i="5.97,287,1669104000"; d="scan'208";a="670076725" Received: from spr-npg-bds1-eec2.sn.intel.com (HELO spr-npg-bds1-eec2..) ([10.233.181.123]) by fmsmga007.fm.intel.com with ESMTP; 10 Feb 2023 10:02:16 -0800 From: Nicolas Chautru To: dev@dpdk.org, maxime.coquelin@redhat.com Cc: hernan.vargas@intel.com, stable@dpdk.org, Nicolas Chautru Subject: [PATCH v2 8/9] baseband/acc: add support for 4GUL with SO and TB Date: Fri, 10 Feb 2023 17:58:40 +0000 Message-Id: <20230210175841.303450-9-nicolas.chautru@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230210175841.303450-1-nicolas.chautru@intel.com> References: <20230209221929.265059-2-nicolas.chautru@intel.com> <20230210175841.303450-1-nicolas.chautru@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implementation to support the case when using LTE decoder with soft output and transport block mode. Signed-off-by: Nicolas Chautru Reviewed-by: Maxime Coquelin --- drivers/baseband/acc/rte_vrb_pmd.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/baseband/acc/rte_vrb_pmd.c b/drivers/baseband/acc/rte_vrb_pmd.c index 5d385ce1a5..236f21dca3 100644 --- a/drivers/baseband/acc/rte_vrb_pmd.c +++ b/drivers/baseband/acc/rte_vrb_pmd.c @@ -1199,15 +1199,12 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw) fcw->bypass_sb_deint = !check_bit(op->turbo_dec.op_flags, RTE_BBDEV_TURBO_SUBBLOCK_DEINTERLEAVE); if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) { - /* FIXME for TB block */ + fcw->c = op->turbo_dec.tb_params.c; fcw->k_pos = op->turbo_dec.tb_params.k_pos; - fcw->k_neg = op->turbo_dec.tb_params.k_neg; } else { + fcw->c = 1; fcw->k_pos = op->turbo_dec.cb_params.k; - fcw->k_neg = op->turbo_dec.cb_params.k; } - fcw->c = 1; - fcw->c_neg = 1; if (check_bit(op->turbo_dec.op_flags, RTE_BBDEV_TURBO_SOFT_OUTPUT)) { fcw->soft_output_en = 1; fcw->sw_soft_out_dis = 0; @@ -1218,8 +1215,14 @@ vrb_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw) if (check_bit(op->turbo_dec.op_flags, RTE_BBDEV_TURBO_EQUALIZER)) { fcw->bypass_teq = 0; - fcw->ea = op->turbo_dec.cb_params.e; - fcw->eb = op->turbo_dec.cb_params.e; + if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) { + fcw->cab = op->turbo_dec.tb_params.cab; + fcw->ea = op->turbo_dec.tb_params.ea; + fcw->eb = op->turbo_dec.tb_params.eb; + } else { + fcw->ea = op->turbo_dec.cb_params.e; + fcw->eb = op->turbo_dec.cb_params.e; + } if (op->turbo_dec.rv_index == 0) fcw->k0_start_col = ACC_FCW_TD_RVIDX_0; else if (op->turbo_dec.rv_index == 1) @@ -1396,9 +1399,7 @@ vrb_dma_desc_td_fill(struct rte_bbdev_dec_op *op, desc->numCBs = 1; if (op->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK) { - k = (r < op->turbo_dec.tb_params.c_neg) - ? op->turbo_dec.tb_params.k_neg - : op->turbo_dec.tb_params.k_pos; + k = op->turbo_dec.tb_params.k_pos; e = (r < op->turbo_dec.tb_params.cab) ? op->turbo_dec.tb_params.ea : op->turbo_dec.tb_params.eb;