@@ -198,9 +198,7 @@ struct fwd_engine * fwd_engines[] = {
&icmp_echo_engine,
&noisy_vnf_engine,
&five_tuple_swap_fwd_engine,
-#ifdef RTE_LIBRTE_IEEE1588
&ieee1588_fwd_engine,
-#endif
&shared_rxq_engine,
NULL,
};
@@ -427,9 +427,7 @@ extern struct fwd_engine csum_fwd_engine;
extern struct fwd_engine icmp_echo_engine;
extern struct fwd_engine noisy_vnf_engine;
extern struct fwd_engine five_tuple_swap_fwd_engine;
-#ifdef RTE_LIBRTE_IEEE1588
extern struct fwd_engine ieee1588_fwd_engine;
-#endif
extern struct fwd_engine shared_rxq_engine;
extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */
@@ -1230,64 +1230,6 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev)
return bnxt_recv_pkts;
}
-#if (defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)) && \
- !defined(RTE_LIBRTE_IEEE1588)
-
- /* Vector mode receive cannot be enabled if scattered rx is in use. */
- if (eth_dev->data->scattered_rx)
- goto use_scalar_rx;
-
- /*
- * Vector mode receive cannot be enabled if Truflow is enabled or if
- * asynchronous completions and receive completions can be placed in
- * the same completion ring.
- */
- if (BNXT_TRUFLOW_EN(bp) || !BNXT_NUM_ASYNC_CPR(bp))
- goto use_scalar_rx;
-
- /*
- * Vector mode receive cannot be enabled if any receive offloads outside
- * a limited subset have been enabled.
- */
- if (eth_dev->data->dev_conf.rxmode.offloads &
- ~(RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
- RTE_ETH_RX_OFFLOAD_KEEP_CRC |
- RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
- RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
- RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
- RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
- RTE_ETH_RX_OFFLOAD_OUTER_UDP_CKSUM |
- RTE_ETH_RX_OFFLOAD_RSS_HASH |
- RTE_ETH_RX_OFFLOAD_VLAN_FILTER))
- goto use_scalar_rx;
-
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {
- PMD_DRV_LOG(INFO,
- "Using AVX2 vector mode receive for port %d\n",
- eth_dev->data->port_id);
- bp->flags |= BNXT_FLAG_RX_VECTOR_PKT_MODE;
- return bnxt_recv_pkts_vec_avx2;
- }
- #endif
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- PMD_DRV_LOG(INFO,
- "Using SSE vector mode receive for port %d\n",
- eth_dev->data->port_id);
- bp->flags |= BNXT_FLAG_RX_VECTOR_PKT_MODE;
- return bnxt_recv_pkts_vec;
- }
-
-use_scalar_rx:
- PMD_DRV_LOG(INFO, "Vector mode receive disabled for port %d\n",
- eth_dev->data->port_id);
- PMD_DRV_LOG(INFO,
- "Port %d scatter: %d rx offload: %" PRIX64 "\n",
- eth_dev->data->port_id,
- eth_dev->data->scattered_rx,
- eth_dev->data->dev_conf.rxmode.offloads);
-#endif
bp->flags &= ~BNXT_FLAG_RX_VECTOR_PKT_MODE;
return bnxt_recv_pkts;
}
@@ -1301,44 +1243,6 @@ bnxt_transmit_function(struct rte_eth_dev *eth_dev)
if (BNXT_CHIP_SR2(bp))
return bnxt_xmit_pkts;
-#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) && \
- !defined(RTE_LIBRTE_IEEE1588)
- uint64_t offloads = eth_dev->data->dev_conf.txmode.offloads;
-
- /*
- * Vector mode transmit can be enabled only if not using scatter rx
- * or tx offloads.
- */
- if (eth_dev->data->scattered_rx ||
- (offloads & ~RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) ||
- BNXT_TRUFLOW_EN(bp))
- goto use_scalar_tx;
-
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {
- PMD_DRV_LOG(INFO,
- "Using AVX2 vector mode transmit for port %d\n",
- eth_dev->data->port_id);
- return bnxt_xmit_pkts_vec_avx2;
- }
-#endif
- if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
- PMD_DRV_LOG(INFO,
- "Using SSE vector mode transmit for port %d\n",
- eth_dev->data->port_id);
- return bnxt_xmit_pkts_vec;
- }
-
-use_scalar_tx:
- PMD_DRV_LOG(INFO, "Vector mode transmit disabled for port %d\n",
- eth_dev->data->port_id);
- PMD_DRV_LOG(INFO,
- "Port %d scatter: %d tx offload: %" PRIX64 "\n",
- eth_dev->data->port_id,
- eth_dev->data->scattered_rx,
- offloads);
-#endif
return bnxt_xmit_pkts;
}
@@ -680,16 +680,13 @@ bnxt_set_ol_flags(struct bnxt_rx_ring_info *rxr, struct rx_pkt_cmpl *rxcmp,
ol_flags |= RTE_MBUF_F_RX_RSS_HASH;
}
-#ifdef RTE_LIBRTE_IEEE1588
if (unlikely((flags_type & RX_PKT_CMPL_FLAGS_MASK) ==
RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP))
ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP | RTE_MBUF_F_RX_IEEE1588_TMST;
-#endif
mbuf->ol_flags = ol_flags;
}
-#ifdef RTE_LIBRTE_IEEE1588
static void
bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
{
@@ -716,7 +713,6 @@ bnxt_get_rx_ts_p5(struct bnxt *bp, uint32_t rx_ts_cmpl)
}
ptp->rx_timestamp = pkt_time;
}
-#endif
static uint32_t
bnxt_ulp_set_mark_in_mbuf(struct bnxt *bp, struct rx_pkt_cmpl_hi *rxcmp1,
@@ -926,12 +922,10 @@ static int bnxt_rx_pkt(struct rte_mbuf **rx_pkt,
mbuf->data_len = mbuf->pkt_len;
mbuf->port = rxq->port_id;
-#ifdef RTE_LIBRTE_IEEE1588
if (unlikely((rte_le_to_cpu_16(rxcmp->flags_type) &
RX_PKT_CMPL_FLAGS_MASK) ==
RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP))
bnxt_get_rx_ts_p5(rxq->bp, rxcmp1->reorder);
-#endif
if (cmp_type == CMPL_BASE_TYPE_RX_L2_V2) {
bnxt_parse_csum_v2(mbuf, rxcmp1);
@@ -48,14 +48,8 @@
/* LPB & SPB */
#define CNXK_NIX_NUM_POOLS_MAX 2
-/* If PTP is enabled additional SEND MEM DESC is required which
- * takes 2 words, hence max 7 iova address are possible
- */
-#if defined(RTE_LIBRTE_IEEE1588)
+/* PTP requires 2 words, hence max 7 IOVA addresses are possible. */
#define CNXK_NIX_TX_NB_SEG_MAX 7
-#else
-#define CNXK_NIX_TX_NB_SEG_MAX 9
-#endif
#define CNXK_NIX_TX_MSEG_SG_DWORDS \
((RTE_ALIGN_MUL_CEIL(CNXK_NIX_TX_NB_SEG_MAX, 3) / 3) + \
@@ -618,9 +618,6 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
return ret;
}
-#if !defined(RTE_LIBRTE_IEEE1588)
- if (rx_offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
-#endif
{
ret = rte_mbuf_dyn_rx_timestamp_register(
&dpaa2_timestamp_dynfield_offset,
@@ -2461,7 +2458,6 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.rxq_info_get = dpaa2_rxq_info_get,
.txq_info_get = dpaa2_txq_info_get,
.tm_ops_get = dpaa2_tm_ops_get,
-#if defined(RTE_LIBRTE_IEEE1588)
.timesync_enable = dpaa2_timesync_enable,
.timesync_disable = dpaa2_timesync_disable,
.timesync_read_time = dpaa2_timesync_read_time,
@@ -2469,7 +2465,6 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.timesync_adjust_time = dpaa2_timesync_adjust_time,
.timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
.timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
-#endif
};
/* Populate the mac address from physically available (u-boot/firmware) and/or
@@ -2681,10 +2676,8 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
priv->max_mac_filters = attr.mac_filter_entries;
priv->max_vlan_filters = attr.vlan_filter_entries;
priv->flags = 0;
-#if defined(RTE_LIBRTE_IEEE1588)
- printf("DPDK IEEE1588 is enabled\n");
priv->flags |= DPAA2_TX_CONF_ENABLE;
-#endif
+
/* Used with ``fslmc:dpni.1,drv_tx_conf=1`` */
if (dpaa2_get_devargs(dev->devargs, DRIVER_TX_CONF)) {
priv->flags |= DPAA2_TX_CONF_ENABLE;
@@ -131,7 +131,6 @@ int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
return 0;
}
-#if defined(RTE_LIBRTE_IEEE1588)
static int
dpaa2_create_dprtc_device(int vdev_fd __rte_unused,
struct vfio_device_info *obj_info __rte_unused,
@@ -181,4 +180,3 @@ static struct rte_dpaa2_object rte_dpaa2_dprtc_obj = {
};
RTE_PMD_REGISTER_DPAA2_OBJECT(dprtc, rte_dpaa2_dprtc_obj);
-#endif
@@ -139,12 +139,10 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
"(4)=0x%" PRIx64 "\t",
annotation->word3, annotation->word4);
-#if defined(RTE_LIBRTE_IEEE1588)
if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP)) {
mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_PTP;
mbuf->ol_flags |= RTE_MBUF_F_RX_IEEE1588_TMST;
}
-#endif
if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
@@ -412,10 +410,9 @@ eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
struct qbman_sge *sgt, *sge = NULL;
int i, offset = 0;
-#ifdef RTE_LIBRTE_IEEE1588
/* annotation area for timestamp in first buffer */
offset = 0x64;
-#endif
+
if (RTE_MBUF_DIRECT(mbuf) &&
(mbuf->data_off > (mbuf->nb_segs * sizeof(struct qbman_sge)
+ offset))) {
@@ -829,12 +826,10 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
bufs[num_rx] = eth_sg_fd_to_mbuf(fd, eth_data->port_id);
else
bufs[num_rx] = eth_fd_to_mbuf(fd, eth_data->port_id);
-#if defined(RTE_LIBRTE_IEEE1588)
if (bufs[num_rx]->ol_flags & RTE_MBUF_F_RX_IEEE1588_TMST) {
priv->rx_timestamp =
*dpaa2_timestamp_dynfield(bufs[num_rx]);
}
-#endif
if (eth_data->dev_conf.rxmode.offloads &
RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
@@ -1050,12 +1045,10 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
bufs[num_rx] = eth_fd_to_mbuf(fd,
eth_data->port_id);
-#if defined(RTE_LIBRTE_IEEE1588)
if (bufs[num_rx]->ol_flags & RTE_MBUF_F_RX_IEEE1588_TMST) {
priv->rx_timestamp =
*dpaa2_timestamp_dynfield(bufs[num_rx]);
}
-#endif
if (eth_data->dev_conf.rxmode.offloads &
RTE_ETH_RX_OFFLOAD_VLAN_STRIP) {
@@ -1088,13 +1081,11 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
struct qbman_release_desc releasedesc;
uint32_t bpid;
uint64_t buf;
-#if defined(RTE_LIBRTE_IEEE1588)
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
struct dpaa2_dev_priv *priv = eth_data->dev_private;
struct dpaa2_annot_hdr *annotation;
void *v_addr;
struct rte_mbuf *mbuf;
-#endif
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
@@ -1177,7 +1168,6 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
dq_storage++;
num_tx_conf++;
num_pulled++;
-#if defined(RTE_LIBRTE_IEEE1588)
v_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
mbuf = DPAA2_INLINE_MBUF_FROM_BUF(v_addr,
rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
@@ -1188,7 +1178,6 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
DPAA2_FD_PTA_SIZE);
priv->tx_timestamp = annotation->word2;
}
-#endif
} while (pending);
/* Last VDQ provided all packets and more packets are requested */
@@ -1259,7 +1248,6 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
DPAA2_PMD_DP_DEBUG("===> eth_data =%p, fqid =%d\n",
eth_data, dpaa2_q->fqid);
-#ifdef RTE_LIBRTE_IEEE1588
/* IEEE1588 driver need pointer to tx confirmation queue
* corresponding to last packet transmitted for reading
* the timestamp
@@ -1269,7 +1257,6 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
priv->tx_timestamp = 0;
}
-#endif
/*Prepare enqueue descriptor*/
qbman_eq_desc_clear(&eqdesc);
@@ -1326,9 +1313,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
(void **)bufs, 1, 0);
#endif
bufs++;
-#ifdef RTE_LIBRTE_IEEE1588
enable_tx_tstamp(&fd_arr[loop]);
-#endif
continue;
}
} else {
@@ -1354,9 +1339,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
loop, 0);
}
bufs++;
-#ifdef RTE_LIBRTE_IEEE1588
enable_tx_tstamp(&fd_arr[loop]);
-#endif
continue;
}
@@ -1409,9 +1392,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
loop, bpid);
}
}
-#ifdef RTE_LIBRTE_IEEE1588
enable_tx_tstamp(&fd_arr[loop]);
-#endif
bufs++;
}
@@ -43,11 +43,6 @@
#include "base/e1000_api.h"
#include "e1000_ethdev.h"
-#ifdef RTE_LIBRTE_IEEE1588
-#define IGB_TX_IEEE1588_TMST RTE_MBUF_F_TX_IEEE1588_TMST
-#else
-#define IGB_TX_IEEE1588_TMST 0
-#endif
/* Bit Mask to indicate what bits required for building TX context */
#define IGB_TX_OFFLOAD_MASK (RTE_MBUF_F_TX_OUTER_IPV6 | \
RTE_MBUF_F_TX_OUTER_IPV4 | \
@@ -57,7 +52,7 @@
RTE_MBUF_F_TX_IP_CKSUM | \
RTE_MBUF_F_TX_L4_MASK | \
RTE_MBUF_F_TX_TCP_SEG | \
- IGB_TX_IEEE1588_TMST)
+ RTE_MBUF_F_TX_IEEE1588_TMST)
#define IGB_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ IGB_TX_OFFLOAD_MASK)
@@ -530,10 +525,8 @@ eth_igb_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
if (tx_ol_req & RTE_MBUF_F_TX_TCP_SEG)
pkt_len -= (tx_pkt->l2_len + tx_pkt->l3_len + tx_pkt->l4_len);
olinfo_status = (pkt_len << E1000_ADVTXD_PAYLEN_SHIFT);
-#if defined(RTE_LIBRTE_IEEE1588)
if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
cmd_type_len |= E1000_ADVTXD_MAC_TSTAMP;
-#endif
if (tx_ol_req) {
/* Setup TX Advanced context descriptor if required */
if (new_ctx) {
@@ -746,7 +739,6 @@ rx_desc_hlen_type_rss_to_pkt_flags(struct igb_rx_queue *rxq, uint32_t hl_tp_rs)
{
uint64_t pkt_flags = ((hl_tp_rs & 0x0F) == 0) ? 0 : RTE_MBUF_F_RX_RSS_HASH;
-#if defined(RTE_LIBRTE_IEEE1588)
static uint32_t ip_pkt_etqf_map[8] = {
0, 0, 0, RTE_MBUF_F_RX_IEEE1588_PTP,
0, 0, 0, 0,
@@ -760,9 +752,6 @@ rx_desc_hlen_type_rss_to_pkt_flags(struct igb_rx_queue *rxq, uint32_t hl_tp_rs)
pkt_flags |= ip_pkt_etqf_map[(hl_tp_rs >> 12) & 0x07];
else
pkt_flags |= ip_pkt_etqf_map[(hl_tp_rs >> 4) & 0x07];
-#else
- RTE_SET_USED(rxq);
-#endif
return pkt_flags;
}
@@ -776,10 +765,9 @@ rx_desc_status_to_pkt_flags(uint32_t rx_status)
pkt_flags = ((rx_status & E1000_RXD_STAT_VP) ?
RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED : 0);
-#if defined(RTE_LIBRTE_IEEE1588)
if (rx_status & E1000_RXD_STAT_TMST)
pkt_flags = pkt_flags | RTE_MBUF_F_RX_IEEE1588_TMST;
-#endif
+
return pkt_flags;
}
@@ -207,20 +207,8 @@ fm10k_desc_to_pktype_v(__m128i descs[4], struct rte_mbuf **rx_pkts)
int __rte_cold
fm10k_rx_vec_condition_check(struct rte_eth_dev *dev)
{
-#ifndef RTE_LIBRTE_IEEE1588
- struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
-
-#ifndef RTE_FM10K_RX_OLFLAGS_ENABLE
- /* without rx ol_flags, no VP flag report */
- if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
- return -1;
-#endif
-
- return 0;
-#else
RTE_SET_USED(dev);
return -1;
-#endif
}
int __rte_cold
@@ -43,12 +43,6 @@
#define I40E_TXD_CMD (I40E_TX_DESC_CMD_EOP | I40E_TX_DESC_CMD_RS)
-#ifdef RTE_LIBRTE_IEEE1588
-#define I40E_TX_IEEE1588_TMST RTE_MBUF_F_TX_IEEE1588_TMST
-#else
-#define I40E_TX_IEEE1588_TMST 0
-#endif
-
#define I40E_TX_CKSUM_OFFLOAD_MASK (RTE_MBUF_F_TX_IP_CKSUM | \
RTE_MBUF_F_TX_L4_MASK | \
RTE_MBUF_F_TX_TCP_SEG | \
@@ -66,7 +60,7 @@
RTE_MBUF_F_TX_VLAN | \
RTE_MBUF_F_TX_TUNNEL_MASK | \
RTE_MBUF_F_TX_OUTER_UDP_CKSUM | \
- I40E_TX_IEEE1588_TMST)
+ RTE_MBUF_F_TX_IEEE1588_TMST)
#define I40E_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_MASK)
@@ -192,7 +186,6 @@ i40e_rxd_error_to_pkt_flags(uint64_t qword)
/* Function to check and set the ieee1588 timesync index and get the
* appropriate flags.
*/
-#ifdef RTE_LIBRTE_IEEE1588
static inline uint64_t
i40e_get_iee15888_flags(struct rte_mbuf *mb, uint64_t qword)
{
@@ -211,7 +204,6 @@ i40e_get_iee15888_flags(struct rte_mbuf *mb, uint64_t qword)
return pkt_flags;
}
-#endif
static inline uint64_t
i40e_rxd_build_fdir(volatile union i40e_rx_desc *rxdp, struct rte_mbuf *mb)
@@ -529,12 +521,8 @@ i40e_rx_scan_hw_ring(struct i40e_rx_queue *rxq)
rxdp[j].wb.qword0.hi_dword.rss);
if (pkt_flags & RTE_MBUF_F_RX_FDIR)
pkt_flags |= i40e_rxd_build_fdir(&rxdp[j], mb);
-
-#ifdef RTE_LIBRTE_IEEE1588
pkt_flags |= i40e_get_iee15888_flags(mb, qword1);
-#endif
mb->ol_flags |= pkt_flags;
-
}
for (j = 0; j < I40E_LOOK_AHEAD; j++)
@@ -798,10 +786,7 @@ i40e_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
rte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss);
if (pkt_flags & RTE_MBUF_F_RX_FDIR)
pkt_flags |= i40e_rxd_build_fdir(&rxd, rxm);
-
-#ifdef RTE_LIBRTE_IEEE1588
pkt_flags |= i40e_get_iee15888_flags(rxm, qword1);
-#endif
rxm->ol_flags |= pkt_flags;
rx_pkts[nb_rx++] = rxm;
@@ -972,10 +957,7 @@ i40e_recv_scattered_pkts(void *rx_queue,
rte_le_to_cpu_32(rxd.wb.qword0.hi_dword.rss);
if (pkt_flags & RTE_MBUF_F_RX_FDIR)
pkt_flags |= i40e_rxd_build_fdir(&rxd, first_seg);
-
-#ifdef RTE_LIBRTE_IEEE1588
pkt_flags |= i40e_get_iee15888_flags(first_seg, qword1);
-#endif
first_seg->ol_flags |= pkt_flags;
/* Prefetch data of first segment, if configured to do so. */
@@ -1017,11 +999,8 @@ i40e_calc_context_desc(uint64_t flags)
static uint64_t mask = RTE_MBUF_F_TX_OUTER_IP_CKSUM |
RTE_MBUF_F_TX_TCP_SEG |
RTE_MBUF_F_TX_QINQ |
- RTE_MBUF_F_TX_TUNNEL_MASK;
-
-#ifdef RTE_LIBRTE_IEEE1588
- mask |= RTE_MBUF_F_TX_IEEE1588_TMST;
-#endif
+ RTE_MBUF_F_TX_TUNNEL_MASK |
+ RTE_MBUF_F_TX_IEEE1588_TMST;
return (flags & mask) ? 1 : 0;
}
@@ -1199,14 +1178,10 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
if (ol_flags & RTE_MBUF_F_TX_TCP_SEG)
cd_type_cmd_tso_mss |=
i40e_set_tso_ctx(tx_pkt, tx_offload);
- else {
-#ifdef RTE_LIBRTE_IEEE1588
- if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
- cd_type_cmd_tso_mss |=
- ((uint64_t)I40E_TX_CTX_DESC_TSYN <<
- I40E_TXD_CTX_QW1_CMD_SHIFT);
-#endif
- }
+ else if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
+ cd_type_cmd_tso_mss |=
+ ((uint64_t)I40E_TX_CTX_DESC_TSYN <<
+ I40E_TXD_CTX_QW1_CMD_SHIFT);
ctx_txd->tunneling_params =
rte_cpu_to_le_32(cd_tunneling_params);
@@ -2805,9 +2780,7 @@ i40e_tx_queue_init(struct i40e_tx_queue *txq)
tx_ctx.base = txq->tx_ring_phys_addr / I40E_QUEUE_BASE_ADDR_UNIT;
tx_ctx.qlen = txq->nb_tx_desc;
-#ifdef RTE_LIBRTE_IEEE1588
tx_ctx.timesync_ena = 1;
-#endif
tx_ctx.rdylist = rte_le_to_cpu_16(vsi->info.qs_handle[txq->dcb_tc]);
if (vsi->type == I40E_VSI_FDIR)
tx_ctx.fd_ena = TRUE;
@@ -207,56 +207,8 @@ i40e_rxq_vec_setup_default(struct i40e_rx_queue *rxq)
static inline int
i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
{
-#ifndef RTE_LIBRTE_IEEE1588
- struct i40e_adapter *ad =
- I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
- struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
- struct i40e_rx_queue *rxq;
- uint16_t desc, i;
- bool first_queue;
-
- /* no QinQ support */
- if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
- return -1;
-
- /**
- * Vector mode is allowed only when number of Rx queue
- * descriptor is power of 2.
- */
- if (!dev->data->dev_started) {
- first_queue = true;
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- if (!rxq)
- continue;
- desc = rxq->nb_rx_desc;
- if (first_queue)
- ad->rx_vec_allowed =
- rte_is_power_of_2(desc);
- else
- ad->rx_vec_allowed =
- ad->rx_vec_allowed ?
- rte_is_power_of_2(desc) :
- ad->rx_vec_allowed;
- first_queue = false;
- }
- } else {
- /* Only check the first queue's descriptor number */
- for (i = 0; i < dev->data->nb_rx_queues; i++) {
- rxq = dev->data->rx_queues[i];
- if (!rxq)
- continue;
- desc = rxq->nb_rx_desc;
- ad->rx_vec_allowed = rte_is_power_of_2(desc);
- break;
- }
- }
-
- return 0;
-#else
RTE_SET_USED(dev);
return -1;
-#endif
}
#endif
@@ -53,11 +53,6 @@
#include "base/ixgbe_common.h"
#include "ixgbe_rxtx.h"
-#ifdef RTE_LIBRTE_IEEE1588
-#define IXGBE_TX_IEEE1588_TMST RTE_MBUF_F_TX_IEEE1588_TMST
-#else
-#define IXGBE_TX_IEEE1588_TMST 0
-#endif
/* Bit Mask to indicate what bits required for building TX context */
#define IXGBE_TX_OFFLOAD_MASK (RTE_MBUF_F_TX_OUTER_IPV6 | \
RTE_MBUF_F_TX_OUTER_IPV4 | \
@@ -70,7 +65,7 @@
RTE_MBUF_F_TX_MACSEC | \
RTE_MBUF_F_TX_OUTER_IP_CKSUM | \
RTE_MBUF_F_TX_SEC_OFFLOAD | \
- IXGBE_TX_IEEE1588_TMST)
+ RTE_MBUF_F_TX_IEEE1588_TMST)
#define IXGBE_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ IXGBE_TX_OFFLOAD_MASK)
@@ -823,10 +818,8 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
cmd_type_len = IXGBE_ADVTXD_DTYP_DATA |
IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
-#ifdef RTE_LIBRTE_IEEE1588
if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
cmd_type_len |= IXGBE_ADVTXD_MAC_1588;
-#endif
olinfo_status = 0;
if (tx_ol_req) {
@@ -1436,7 +1429,6 @@ ixgbe_rxd_pkt_info_to_pkt_flags(uint16_t pkt_info)
RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
0, 0, 0, RTE_MBUF_F_RX_FDIR,
};
-#ifdef RTE_LIBRTE_IEEE1588
static uint64_t ip_pkt_etqf_map[8] = {
0, 0, 0, RTE_MBUF_F_RX_IEEE1588_PTP,
0, 0, 0, 0,
@@ -1447,9 +1439,6 @@ ixgbe_rxd_pkt_info_to_pkt_flags(uint16_t pkt_info)
ip_rss_types_map[pkt_info & 0XF];
else
return ip_rss_types_map[pkt_info & 0XF];
-#else
- return ip_rss_types_map[pkt_info & 0XF];
-#endif
}
static inline uint64_t
@@ -1464,10 +1453,9 @@ rx_desc_status_to_pkt_flags(uint32_t rx_status, uint64_t vlan_flags)
*/
pkt_flags = (rx_status & IXGBE_RXD_STAT_VP) ? vlan_flags : 0;
-#ifdef RTE_LIBRTE_IEEE1588
if (rx_status & IXGBE_RXD_STAT_TMST)
pkt_flags = pkt_flags | RTE_MBUF_F_RX_IEEE1588_TMST;
-#endif
+
return pkt_flags;
}
@@ -276,17 +276,7 @@ ixgbe_txq_vec_setup_default(struct ixgbe_tx_queue *txq,
static inline int
ixgbe_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
{
-#ifndef RTE_LIBRTE_IEEE1588
- struct rte_eth_fdir_conf *fconf = IXGBE_DEV_FDIR_CONF(dev);
-
- /* no fdir support */
- if (fconf->mode != RTE_FDIR_MODE_NONE)
- return -1;
-
- return 0;
-#else
RTE_SET_USED(dev);
return -1;
-#endif
}
#endif
@@ -16,12 +16,6 @@
#include "ngbe_ethdev.h"
#include "ngbe_rxtx.h"
-#ifdef RTE_LIBRTE_IEEE1588
-#define NGBE_TX_IEEE1588_TMST RTE_MBUF_F_TX_IEEE1588_TMST
-#else
-#define NGBE_TX_IEEE1588_TMST 0
-#endif
-
/* Bit Mask to indicate what bits required for building Tx context */
static const u64 NGBE_TX_OFFLOAD_MASK = (RTE_MBUF_F_TX_IP_CKSUM |
RTE_MBUF_F_TX_OUTER_IPV6 |
@@ -33,7 +27,7 @@ static const u64 NGBE_TX_OFFLOAD_MASK = (RTE_MBUF_F_TX_IP_CKSUM |
RTE_MBUF_F_TX_TCP_SEG |
RTE_MBUF_F_TX_TUNNEL_MASK |
RTE_MBUF_F_TX_OUTER_IP_CKSUM |
- NGBE_TX_IEEE1588_TMST);
+ RTE_MBUF_F_TX_IEEE1588_TMST);
#define NGBE_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ NGBE_TX_OFFLOAD_MASK)
@@ -739,10 +733,8 @@ ngbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
*/
cmd_type_len = NGBE_TXD_FCS;
-#ifdef RTE_LIBRTE_IEEE1588
if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
cmd_type_len |= NGBE_TXD_1588;
-#endif
olinfo_status = 0;
if (tx_ol_req) {
@@ -920,7 +912,6 @@ ngbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
0, 0, 0, RTE_MBUF_F_RX_FDIR,
};
-#ifdef RTE_LIBRTE_IEEE1588
static uint64_t ip_pkt_etqf_map[8] = {
0, 0, 0, RTE_MBUF_F_RX_IEEE1588_PTP,
0, 0, 0, 0,
@@ -931,9 +922,6 @@ ngbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
ip_rss_types_map[NGBE_RXD_RSSTYPE(pkt_info)];
else
return ip_rss_types_map[NGBE_RXD_RSSTYPE(pkt_info)];
-#else
- return ip_rss_types_map[NGBE_RXD_RSSTYPE(pkt_info)];
-#endif
}
static inline uint64_t
@@ -950,10 +938,9 @@ rx_desc_status_to_pkt_flags(uint32_t rx_status, uint64_t vlan_flags)
vlan_flags & RTE_MBUF_F_RX_VLAN_STRIPPED)
? vlan_flags : 0;
-#ifdef RTE_LIBRTE_IEEE1588
if (rx_status & NGBE_RXD_STAT_1588)
pkt_flags = pkt_flags | RTE_MBUF_F_RX_IEEE1588_TMST;
-#endif
+
return pkt_flags;
}
@@ -42,12 +42,6 @@
#include "txgbe_ethdev.h"
#include "txgbe_rxtx.h"
-#ifdef RTE_LIBRTE_IEEE1588
-#define TXGBE_TX_IEEE1588_TMST RTE_MBUF_F_TX_IEEE1588_TMST
-#else
-#define TXGBE_TX_IEEE1588_TMST 0
-#endif
-
/* Bit Mask to indicate what bits required for building TX context */
static const u64 TXGBE_TX_OFFLOAD_MASK = (RTE_MBUF_F_TX_IP_CKSUM |
RTE_MBUF_F_TX_OUTER_IPV6 |
@@ -63,7 +57,7 @@ static const u64 TXGBE_TX_OFFLOAD_MASK = (RTE_MBUF_F_TX_IP_CKSUM |
#ifdef RTE_LIB_SECURITY
RTE_MBUF_F_TX_SEC_OFFLOAD |
#endif
- TXGBE_TX_IEEE1588_TMST);
+ RTE_MBUF_F_TX_IEEE1588_TMST);
#define TXGBE_TX_OFFLOAD_NOTSUP_MASK \
(RTE_MBUF_F_TX_OFFLOAD_MASK ^ TXGBE_TX_OFFLOAD_MASK)
@@ -915,10 +909,8 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
*/
cmd_type_len = TXGBE_TXD_FCS;
-#ifdef RTE_LIBRTE_IEEE1588
if (ol_flags & RTE_MBUF_F_TX_IEEE1588_TMST)
cmd_type_len |= TXGBE_TXD_1588;
-#endif
olinfo_status = 0;
if (tx_ol_req) {
@@ -1102,7 +1094,6 @@ txgbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
0, 0, 0, RTE_MBUF_F_RX_FDIR,
};
-#ifdef RTE_LIBRTE_IEEE1588
static uint64_t ip_pkt_etqf_map[8] = {
0, 0, 0, RTE_MBUF_F_RX_IEEE1588_PTP,
0, 0, 0, 0,
@@ -1113,9 +1104,6 @@ txgbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
ip_rss_types_map[TXGBE_RXD_RSSTYPE(pkt_info)];
else
return ip_rss_types_map[TXGBE_RXD_RSSTYPE(pkt_info)];
-#else
- return ip_rss_types_map[TXGBE_RXD_RSSTYPE(pkt_info)];
-#endif
}
static inline uint64_t
@@ -1132,10 +1120,9 @@ rx_desc_status_to_pkt_flags(uint32_t rx_status, uint64_t vlan_flags)
vlan_flags & RTE_MBUF_F_RX_VLAN_STRIPPED)
? vlan_flags : 0;
-#ifdef RTE_LIBRTE_IEEE1588
if (rx_status & TXGBE_RXD_STAT_1588)
pkt_flags = pkt_flags | RTE_MBUF_F_RX_IEEE1588_TMST;
-#endif
+
return pkt_flags;
}