From patchwork Thu Feb 2 09:21:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiawen Wu X-Patchwork-Id: 122897 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E3F1141BAB; Thu, 2 Feb 2023 10:26:03 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C397842D7E; Thu, 2 Feb 2023 10:25:53 +0100 (CET) Received: from smtpbgbr1.qq.com (smtpbgbr1.qq.com [54.207.19.206]) by mails.dpdk.org (Postfix) with ESMTP id A68E242D40; Thu, 2 Feb 2023 10:25:48 +0100 (CET) X-QQ-mid: bizesmtp85t1675329944t602ml4e Received: from wxdbg.localdomain.com ( [183.129.236.74]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 02 Feb 2023 17:25:42 +0800 (CST) X-QQ-SSF: 01400000002000H0Y000B00A0000000 X-QQ-FEAT: cBa71F6Ap8QKFQG6nmuJE2Jfdd7B5Lko+6EXdV4z1EZKz40h0ARP46nmzAOUI J4b6DdACAnFknpH5vOdc0CHz7DVrH3FHRtTG+Mk5divU3GqUp1nqbwC9gUABX0PB8QoAslV ek0Chck1uYNyt21wy4fxs7isOm5FiKwLdMwpqwxolULtvpeCJnjNrhioe9RvuELMSjchdgD 3p8mPhoCeMF+EMv1BJ3sMEJk+4bxZieb22PB0sG+O6pop81x1IqS7puah3C1F4jOwgpPloy ZqzBEzUUQA0VKvT4/Oiq7hUeGc4DgnvmSVVwRLGd9529grBveWLuAIHIplt5gV3+k+XokrC 4WRXaxFog+2aNdw7tqNoz/4jYcHelQCpiat7LQxXvmEQy5bBgvUZY4cfYjb+983cP3Sljyr 9zrvvBzsTVwGNnDmjYhyHg== X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu , stable@dpdk.org Subject: [PATCH v2 03/10] net/txgbe: fix default signal quality value for KX/KX4 Date: Thu, 2 Feb 2023 17:21:25 +0800 Message-Id: <20230202092132.3271910-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20230202092132.3271910-1-jiawenwu@trustnetic.com> References: <20230118060039.3074016-1-jiawenwu@trustnetic.com> <20230202092132.3271910-1-jiawenwu@trustnetic.com> MIME-Version: 1.0 X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybglogicsvr:qybglogicsvr5 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On old firmware versions, the default value of signal quality(TX_EQ) is configured by the driver. Fix it for KX/KX4 mode. Fixes: 01c3cf5c85a7 ("net/txgbe: add autoneg control read and write") Cc: stable@dpdk.org Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_phy.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_phy.c b/drivers/net/txgbe/base/txgbe_phy.c index 9f46d5bdb0..87935abdaa 100644 --- a/drivers/net/txgbe/base/txgbe_phy.c +++ b/drivers/net/txgbe/base/txgbe_phy.c @@ -1693,9 +1693,10 @@ txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg) wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { value = (0x1804 & ~0x3F3F); + value |= 40 << 8; wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 40 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } out: @@ -1907,10 +1908,10 @@ txgbe_set_link_to_kx(struct txgbe_hw *hw, value |= hw->phy.ffe_post | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } else if (hw->fw_version <= TXGBE_FW_N_TXEQ) { - value = (0x1804 & ~0x3F3F) | (24 << 8) | 4; + value = (0x1804 & ~0x3F3F) | (40 << 8); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL0, value); - value = (0x50 & ~0x7F) | 16 | (1 << 6); + value = (0x50 & ~0x7F) | (1 << 6); wr32_epcs(hw, TXGBE_PHY_TX_EQ_CTL1, value); } out: