net/mlx5: support ESP item in Verbs interface
Checks
Commit Message
ESP item is not currently supported in Verbs interface.
Validate/translate ESP item in Verbs interface.
Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
doc/guides/nics/mlx5.rst | 3 ++
drivers/common/mlx5/linux/meson.build | 2 +
drivers/net/mlx5/mlx5_flow_verbs.c | 57 +++++++++++++++++++++++++
drivers/net/mlx5/windows/mlx5_flow_os.c | 9 +++-
4 files changed, 69 insertions(+), 2 deletions(-)
Comments
Hi,
> -----Original Message-----
> From: Maayan Kashani <mkashani@nvidia.com>
> Sent: Wednesday, January 4, 2023 1:59 PM
> To: dev@dpdk.org
> Cc: Maayan Kashani <mkashani@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] net/mlx5: support ESP item in Verbs interface
>
> ESP item is not currently supported in Verbs interface.
>
> Validate/translate ESP item in Verbs interface.
>
> Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
Got it, thanks!
Regards,
Maayan Kashani
> -----Original Message-----
> From: Raslan Darawsheh <rasland@nvidia.com>
> Sent: Wednesday, 11 January 2023 9:32
> To: Maayan Kashani <mkashani@nvidia.com>; dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>
> Subject: RE: [PATCH] net/mlx5: support ESP item in Verbs interface
>
> Hi,
>
> > -----Original Message-----
> > From: Maayan Kashani <mkashani@nvidia.com>
> > Sent: Wednesday, January 4, 2023 1:59 PM
> > To: dev@dpdk.org
> > Cc: Maayan Kashani <mkashani@nvidia.com>; Matan Azrad
> > <matan@nvidia.com>; Raslan Darawsheh <rasland@nvidia.com>; Slava
> > Ovsiienko <viacheslavo@nvidia.com>
> > Subject: [PATCH] net/mlx5: support ESP item in Verbs interface
> >
> > ESP item is not currently supported in Verbs interface.
> >
> > Validate/translate ESP item in Verbs interface.
> >
> > Signed-off-by: Maayan Kashani <mkashani@nvidia.com>
> > Acked-by: Matan Azrad <matan@nvidia.com>
>
> Patch applied to next-net-mlx,
>
> Kindest regards,
> Raslan Darawsheh
@@ -599,6 +599,9 @@ Limitations
- The NIC egress flow rules on representor port are not supported.
+- When using DV/verbs flow engine (``dv_flow_en`` = 1/0 respectively), Match on SPI field
+ in ESP header for group 0 needs MLNX_OFED 5.6+.
+
Statistics
----------
@@ -81,6 +81,8 @@ has_member_args = [
# [ "MACRO to define if found", "header for the search",
# "symbol to search" ]
has_sym_args = [
+ [ 'HAVE_IBV_FLOW_SPEC_ESP', 'infiniband/verbs.h',
+ 'IBV_FLOW_SPEC_ESP' ],
[ 'HAVE_IBV_RX_HASH_IPSEC_SPI', 'infiniband/verbs.h',
'IBV_RX_HASH_IPSEC_SPI' ],
[ 'HAVE_IBV_RELAXED_ORDERING', 'infiniband/verbs.h',
@@ -24,6 +24,7 @@
#include "mlx5.h"
#include "mlx5_flow.h"
#include "mlx5_rx.h"
+#include "mlx5_flow_os.h"
#define VERBS_SPEC_INNER(item_flags) \
(!!((item_flags) & MLX5_FLOW_LAYER_TUNNEL) ? IBV_FLOW_SPEC_INNER : 0)
@@ -672,6 +673,42 @@ flow_verbs_translate_item_tcp(struct mlx5_flow *dev_flow,
flow_verbs_spec_add(&dev_flow->verbs, &tcp, size);
}
+/**
+ * Convert the @p item into a Verbs specification. This function assumes that
+ * the input is valid and that there is space to insert the requested item
+ * into the flow.
+ *
+ * @param[in, out] dev_flow
+ * Pointer to dev_flow structure.
+ * @param[in] item
+ * Item specification.
+ * @param[in] item_flags
+ * Parsed item flags.
+ */
+#ifdef HAVE_IBV_FLOW_SPEC_ESP
+static void
+flow_verbs_translate_item_esp(struct mlx5_flow *dev_flow,
+ const struct rte_flow_item *item,
+ uint64_t item_flags __rte_unused)
+{
+ const struct rte_flow_item_esp *spec = item->spec;
+ const struct rte_flow_item_esp *mask = item->mask;
+ unsigned int size = sizeof(struct ibv_flow_spec_esp);
+ struct ibv_flow_spec_esp esp = {
+ .type = IBV_FLOW_SPEC_ESP | VERBS_SPEC_INNER(item_flags),
+ .size = size,
+ };
+
+ if (!mask)
+ mask = &rte_flow_item_esp_mask;
+ if (spec) {
+ esp.val.spi = spec->hdr.spi & mask->hdr.spi;
+ esp.mask.spi = mask->hdr.spi;
+ }
+ flow_verbs_spec_add(&dev_flow->verbs, &esp, size);
+}
+#endif
+
/**
* Convert the @p item into a Verbs specification. This function assumes that
* the input is valid and that there is space to insert the requested item
@@ -1293,6 +1330,14 @@ flow_verbs_validate(struct rte_eth_dev *dev,
int ret = 0;
switch (items->type) {
+ case RTE_FLOW_ITEM_TYPE_ESP:
+ ret = mlx5_flow_os_validate_item_esp(items, item_flags,
+ next_protocol,
+ error);
+ if (ret < 0)
+ return ret;
+ last_item = MLX5_FLOW_ITEM_ESP;
+ break;
case RTE_FLOW_ITEM_TYPE_VOID:
break;
case RTE_FLOW_ITEM_TYPE_ETH:
@@ -1879,6 +1924,18 @@ flow_verbs_translate(struct rte_eth_dev *dev,
item_flags |= tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
MLX5_FLOW_LAYER_OUTER_L4_UDP;
break;
+#ifdef HAVE_IBV_FLOW_SPEC_ESP
+ case RTE_FLOW_ITEM_TYPE_ESP:
+ flow_verbs_translate_item_esp(dev_flow, items,
+ item_flags);
+ dev_flow->hash_fields |=
+ mlx5_flow_hashfields_adjust
+ (rss_desc, tunnel,
+ RTE_ETH_RSS_ESP,
+ IBV_RX_HASH_IPSEC_SPI);
+ item_flags |= MLX5_FLOW_ITEM_ESP;
+ break;
+#endif
case RTE_FLOW_ITEM_TYPE_VXLAN:
flow_verbs_translate_item_vxlan(dev_flow, items,
item_flags);
@@ -419,8 +419,8 @@ mlx5_flow_os_set_specific_workspace(struct mlx5_flow_workspace *data)
int
mlx5_flow_os_validate_item_esp(const struct rte_flow_item *item,
- uint64_t item_flags,
- uint8_t target_protocol,
+ uint64_t item_flags __rte_unused,
+ uint8_t target_protocol __rte_unused,
struct rte_flow_error *error)
{
const struct rte_flow_item_esp *mask = item->mask;
@@ -432,6 +432,11 @@ mlx5_flow_os_validate_item_esp(const struct rte_flow_item *item,
MLX5_FLOW_LAYER_OUTER_L4;
int ret;
+#ifndef HAVE_IBV_FLOW_SPEC_ESP
+ return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ITEM, item,
+ "ESP item not supported");
+#endif
if (!(item_flags & l3m))
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ITEM, item,