[1/2] net/igc/base: support Tx timestamp offload
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Commit Message
Add definitions for Tx timestamp offload
"RTE_ETH_TX_OFFLOAD_SEND_ON_TIMESTAMP".
Signed-off-by: Simei Su <simei.su@intel.com>
---
drivers/net/igc/base/igc_defines.h | 9 +++++++++
drivers/net/igc/base/igc_regs.h | 8 ++++++++
2 files changed, 17 insertions(+)
@@ -188,6 +188,15 @@
#define IGC_RCTL_BSEX 0x02000000 /* Buffer size extension */
#define IGC_RCTL_SECRC 0x04000000 /* Strip Ethernet CRC */
+#define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */
+#define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */
+
+/* Transmit Scheduling */
+#define IGC_TQAVCTRL_TRANSMIT_MODE_TSN 0x00000001
+#define IGC_TQAVCTRL_ENHANCED_QAV 0x00000008
+
+#define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x00000001
+
/* Use byte values for the following shift parameters
* Usage:
* psrctl |= (((ROUNDUP(value0, 128) >> IGC_PSRCTL_BSIZE0_SHIFT) &
@@ -602,6 +602,14 @@
#define IGC_RXMTRL 0x0B634 /* Time sync Rx EtherType and Msg Type - RW */
#define IGC_RXUDP 0x0B638 /* Time Sync Rx UDP Port - RW */
+#define IGC_QBVCYCLET 0x331C
+#define IGC_QBVCYCLET_S 0x3320
+#define IGC_STQT(_n) (0x3324 + 0x4 * (_n))
+#define IGC_ENDQT(_n) (0x3334 + 0x4 * (_n))
+#define IGC_TXQCTL(_n) (0x3344 + 0x4 * (_n))
+#define IGC_BASET_L 0x3314
+#define IGC_BASET_H 0x3318
+
/* Filtering Registers */
#define IGC_SAQF(_n) (0x05980 + (4 * (_n))) /* Source Address Queue Fltr */
#define IGC_DAQF(_n) (0x059A0 + (4 * (_n))) /* Dest Address Queue Fltr */