[V1,06/11] net/mlx5/hws: added allow-other-vhca-access command

Message ID 20221218150853.2167280-7-erezsh@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series Support resource sharing among ibv_devices |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

Erez Shitrit Dec. 18, 2022, 3:08 p.m. UTC
  From: Yevgeny Kliteynik <kliteyn@nvidia.com>


Added FW command to allow creation of alias objects.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
---
 drivers/common/mlx5/mlx5_prm.h    | 23 +++++++++++++++++++++++
 drivers/net/mlx5/hws/mlx5dr_cmd.c | 28 ++++++++++++++++++++++++++++
 drivers/net/mlx5/hws/mlx5dr_cmd.h |  9 +++++++++
 3 files changed, 60 insertions(+)
  

Patch

diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index dfa25c2b49..9d36645949 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -1133,6 +1133,7 @@  enum {
 	MLX5_CMD_SET_REGEX_REGISTERS = 0xb06,
 	MLX5_CMD_QUERY_REGEX_REGISTERS = 0xb07,
 	MLX5_CMD_OP_ACCESS_REGISTER_USER = 0xb0c,
+	MLX5_CMD_OP_ALLOW_OTHER_VHCA_ACCESS = 0xb16,
 };
 
 enum {
@@ -3150,6 +3151,28 @@  struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
 	u8 reserved_at_60[0x20];
 };
 
+struct mlx5_ifc_allow_other_vhca_access_in_bits {
+	u8 opcode[0x10];
+	u8 uid[0x10];
+	u8 reserved_at_20[0x10];
+	u8 op_mod[0x10];
+	u8 reserved_at_40[0x50];
+	u8 object_type_to_be_accessed[0x10];
+	u8 object_id_to_be_accessed[0x20];
+	u8 reserved_at_c0[0x40];
+	union {
+		u8 access_key_raw[0x100];
+		u8 access_key[8][0x20];
+	};
+};
+
+struct mlx5_ifc_allow_other_vhca_access_out_bits {
+	u8 status[0x8];
+	u8 reserved_at_8[0x18];
+	u8 syndrome[0x20];
+	u8 reserved_at_40[0x40];
+};
+
 struct mlx5_ifc_virtio_q_counters_bits {
 	u8 modify_field_select[0x40];
 	u8 reserved_at_40[0x40];
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c
index 2156fd6643..b120be2d88 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c
@@ -716,6 +716,34 @@  int mlx5dr_cmd_sq_modify_rdy(struct mlx5dr_devx_obj *devx_obj)
 	return ret;
 }
 
+int mlx5dr_cmd_allow_other_vhca_access(struct ibv_context *ctx,
+				       struct mlx5dr_cmd_allow_other_vhca_access_attr *attr)
+{
+	uint32_t out[MLX5_ST_SZ_DW(allow_other_vhca_access_out)] = {0};
+	uint32_t in[MLX5_ST_SZ_DW(allow_other_vhca_access_in)] = {0};
+	void *key;
+	int ret;
+
+	MLX5_SET(allow_other_vhca_access_in,
+		 in, opcode, MLX5_CMD_OP_ALLOW_OTHER_VHCA_ACCESS);
+	MLX5_SET(allow_other_vhca_access_in,
+		 in, object_type_to_be_accessed, attr->obj_type);
+	MLX5_SET(allow_other_vhca_access_in,
+		 in, object_id_to_be_accessed, attr->obj_id);
+
+	key = MLX5_ADDR_OF(allow_other_vhca_access_in, in, access_key);
+	memcpy(key, attr->access_key, sizeof(attr->access_key));
+
+	ret = mlx5_glue->devx_general_cmd(ctx, in, sizeof(in), out, sizeof(out));
+	if (ret) {
+		DR_LOG(ERR, "Failed to execute ALLOW_OTHER_VHCA_ACCESS command");
+		rte_errno = errno;
+		return rte_errno;
+	}
+
+	return 0;
+}
+
 int mlx5dr_cmd_query_caps(struct ibv_context *ctx,
 			  struct mlx5dr_cmd_query_caps *caps)
 {
diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h
index ab61e27fd8..ea6ced9d27 100644
--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h
+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h
@@ -124,6 +124,12 @@  struct mlx5dr_cmd_sq_create_attr {
 	uint32_t ts_format;
 };
 
+struct mlx5dr_cmd_allow_other_vhca_access_attr {
+	uint16_t obj_type;
+	uint32_t obj_id;
+	uint8_t access_key[32];
+};
+
 struct mlx5dr_cmd_query_ft_caps {
 	uint8_t max_level;
 	uint8_t reparse;
@@ -230,4 +236,7 @@  void mlx5dr_cmd_set_attr_connect_miss_tbl(struct mlx5dr_context *ctx,
 					  uint32_t fw_ft_type,
 					  enum mlx5dr_table_type type,
 					  struct mlx5dr_cmd_ft_modify_attr *ft_attr);
+
+int mlx5dr_cmd_allow_other_vhca_access(struct ibv_context *ctx,
+				       struct mlx5dr_cmd_allow_other_vhca_access_attr *attr);
 #endif /* MLX5DR_CMD_H_ */