From patchwork Mon Nov 21 12:45:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanumanth Pothula X-Patchwork-Id: 119996 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3447AA055F; Mon, 21 Nov 2022 13:45:57 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0F604014F; Mon, 21 Nov 2022 13:45:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id BDB38400EF for ; Mon, 21 Nov 2022 13:45:54 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2ALBUXOx014582; Mon, 21 Nov 2022 04:45:54 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=mgbdP9Vq8ZOSJjLkbqYnW2ExbqMgdEnndCdcZotqQp4=; b=YWd1aP1iu2GJNJ9DmeKw0o8/be5a8DmmINUORk8LcxcniKQTite9lEcvVzRPDm/IpYtB oVyz+BH2gobXQVxJraIhAB8SB24JJBK42Kqpj7OuOoiVVx3NAqt5vapMwEzp1ari+6S/ 1ZyDODCbu4gUVH0rJzDhpVLDmOoJygs/DmaBr8krKiLrF8spb4yGodoOEiKbTTK18GZ4 2OPpgQi569WFW5DkMdefaZn5OqQ3Sl+uh+sN5nCgokAl2P4qJvJ/WasLlEgyNFN8U9aq cc3vNrj2MsUqzljSBXs/qLKSdSVpFlFWFRJ16FKqMLGED+pEh1hkUrKIYTOcAqrhOhEW lw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3kxyhrwmr7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 21 Nov 2022 04:45:54 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 21 Nov 2022 04:45:51 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 21 Nov 2022 04:45:51 -0800 Received: from localhost.localdomain (unknown [10.28.36.155]) by maili.marvell.com (Postfix) with ESMTP id 42B943F7060; Mon, 21 Nov 2022 04:45:49 -0800 (PST) From: Hanumanth Pothula To: Aman Singh , Yuying Zhang CC: , , , , , , Subject: [PATCH v5 1/1] app/testpmd: add valid check to verify multi mempool feature Date: Mon, 21 Nov 2022 18:15:46 +0530 Message-ID: <20221121124546.3920722-1-hpothula@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221118141334.3825072-1-hpothula@marvell.com> References: <20221118141334.3825072-1-hpothula@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: TBKas__YlELar1zSNqSsaGkdyDasEaJw X-Proofpoint-ORIG-GUID: TBKas__YlELar1zSNqSsaGkdyDasEaJw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-21_13,2022-11-18_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Validate ethdev parameter 'max_rx_mempools' to know whether device supports multi-mempool feature or not. Also, add new testpmd command line argument, multi-mempool, to control multi-mempool feature. By default its disabled. Bugzilla ID: 1128 Fixes: 4f04edcda769 ("app/testpmd: support multiple mbuf pools per Rx queue") Signed-off-by: Hanumanth Pothula --- v5: - Added testpmd argument to enable multi-mempool feature. - Simplified logic to distinguish between multi-mempool, multi-segment and single pool/segment. v4: - updated if condition. v3: - Simplified conditional check. - Corrected spell, whether. v2: - Rebased on tip of next-net/main. --- app/test-pmd/parameters.c | 3 ++ app/test-pmd/testpmd.c | 58 +++++++++++++++++++++++++-------------- app/test-pmd/testpmd.h | 1 + 3 files changed, 41 insertions(+), 21 deletions(-) diff --git a/app/test-pmd/parameters.c b/app/test-pmd/parameters.c index aed4cdcb84..26d6450db4 100644 --- a/app/test-pmd/parameters.c +++ b/app/test-pmd/parameters.c @@ -700,6 +700,7 @@ launch_args_parse(int argc, char** argv) { "rx-mq-mode", 1, 0, 0 }, { "record-core-cycles", 0, 0, 0 }, { "record-burst-stats", 0, 0, 0 }, + { "multi-mempool", 0, 0, 0 }, { PARAM_NUM_PROCS, 1, 0, 0 }, { PARAM_PROC_ID, 1, 0, 0 }, { 0, 0, 0, 0 }, @@ -1449,6 +1450,8 @@ launch_args_parse(int argc, char** argv) record_core_cycles = 1; if (!strcmp(lgopts[opt_idx].name, "record-burst-stats")) record_burst_stats = 1; + if (!strcmp(lgopts[opt_idx].name, "multi-mempool")) + multi_mempool = 1; if (!strcmp(lgopts[opt_idx].name, PARAM_NUM_PROCS)) num_procs = atoi(optarg); if (!strcmp(lgopts[opt_idx].name, PARAM_PROC_ID)) diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c index 4e25f77c6a..9dfc4c9d0e 100644 --- a/app/test-pmd/testpmd.c +++ b/app/test-pmd/testpmd.c @@ -497,6 +497,11 @@ uint8_t record_burst_stats; */ uint32_t rxq_share; +/* + * Multi-mempool support, disabled by default. + */ +uint8_t multi_mempool; + unsigned int num_sockets = 0; unsigned int socket_ids[RTE_MAX_NUMA_NODES]; @@ -2655,28 +2660,23 @@ rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, union rte_eth_rxseg rx_useg[MAX_SEGS_BUFFER_SPLIT] = {}; struct rte_mempool *rx_mempool[MAX_MEMPOOL] = {}; struct rte_mempool *mpx; + struct rte_eth_dev_info dev_info; unsigned int i, mp_n; uint32_t prev_hdrs = 0; int ret; + ret = rte_eth_dev_info_get(port_id, &dev_info); + if (ret != 0) + return ret; + /* Verify Rx queue configuration is single pool and segment or * multiple pool/segment. + * @see rte_eth_dev_info::max_rx_mempools * @see rte_eth_rxconf::rx_mempools * @see rte_eth_rxconf::rx_seg */ - if (!(mbuf_data_size_n > 1) && !(rx_pkt_nb_segs > 1 || - ((rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) != 0))) { - /* Single pool/segment configuration */ - rx_conf->rx_seg = NULL; - rx_conf->rx_nseg = 0; - ret = rte_eth_rx_queue_setup(port_id, rx_queue_id, - nb_rx_desc, socket_id, - rx_conf, mp); - goto exit; - } - - if (rx_pkt_nb_segs > 1 || - rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) { + if ((rx_pkt_nb_segs > 1) && + (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT)) { /* multi-segment configuration */ for (i = 0; i < rx_pkt_nb_segs; i++) { struct rte_eth_rxseg_split *rx_seg = &rx_useg[i].split; @@ -2701,7 +2701,14 @@ rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, } rx_conf->rx_nseg = rx_pkt_nb_segs; rx_conf->rx_seg = rx_useg; - } else { + rx_conf->rx_mempools = NULL; + rx_conf->rx_nmempool = 0; + ret = rte_eth_rx_queue_setup(port_id, rx_queue_id, nb_rx_desc, + socket_id, rx_conf, NULL); + rx_conf->rx_seg = NULL; + rx_conf->rx_nseg = 0; + } else if ((multi_mempool == 1) && (dev_info.max_rx_mempools != 0) && + (mbuf_data_size_n > 1)) { /* multi-pool configuration */ for (i = 0; i < mbuf_data_size_n; i++) { mpx = mbuf_pool_find(socket_id, i); @@ -2709,14 +2716,23 @@ rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, } rx_conf->rx_mempools = rx_mempool; rx_conf->rx_nmempool = mbuf_data_size_n; - } - ret = rte_eth_rx_queue_setup(port_id, rx_queue_id, nb_rx_desc, + rx_conf->rx_seg = NULL; + rx_conf->rx_nseg = 0; + ret = rte_eth_rx_queue_setup(port_id, rx_queue_id, nb_rx_desc, socket_id, rx_conf, NULL); - rx_conf->rx_seg = NULL; - rx_conf->rx_nseg = 0; - rx_conf->rx_mempools = NULL; - rx_conf->rx_nmempool = 0; -exit: + rx_conf->rx_mempools = NULL; + rx_conf->rx_nmempool = 0; + } else { + /* Single pool/segment configuration */ + rx_conf->rx_seg = NULL; + rx_conf->rx_nseg = 0; + rx_conf->rx_mempools = NULL; + rx_conf->rx_nmempool = 0; + ret = rte_eth_rx_queue_setup(port_id, rx_queue_id, nb_rx_desc, + socket_id, rx_conf, mp); + } + + ports[port_id].rxq[rx_queue_id].state = rx_conf->rx_deferred_start ? RTE_ETH_QUEUE_STATE_STOPPED : RTE_ETH_QUEUE_STATE_STARTED; diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h index aaf69c349a..9472a2cb19 100644 --- a/app/test-pmd/testpmd.h +++ b/app/test-pmd/testpmd.h @@ -464,6 +464,7 @@ enum dcb_mode_enable extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */ /* globals used for configuration */ +extern uint8_t multi_mempool; /**< Enables multi-mempool feature. */ extern uint8_t record_core_cycles; /**< Enables measurement of CPU cycles */ extern uint8_t record_burst_stats; /**< Enables display of RX and TX bursts */ extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */