[v3,2/3] eal: add power mgmt support on Arm

Message ID 20221111072649.3304429-3-feifei.wang2@arm.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series Enable PMD power management on Arm |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Feifei Wang Nov. 11, 2022, 7:26 a.m. UTC
  For Arm aarch, use WFE instruction to enable power monitor API, and use
SEV instruction to enable wake up API.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
 lib/eal/arm/include/rte_pause_64.h |  5 ++-
 lib/eal/arm/rte_cpuflags.c         |  5 +++
 lib/eal/arm/rte_power_intrinsics.c | 72 ++++++++++++++++++++++++++++--
 3 files changed, 78 insertions(+), 4 deletions(-)
  

Patch

diff --git a/lib/eal/arm/include/rte_pause_64.h b/lib/eal/arm/include/rte_pause_64.h
index c21600ca96..5f70e97481 100644
--- a/lib/eal/arm/include/rte_pause_64.h
+++ b/lib/eal/arm/include/rte_pause_64.h
@@ -25,9 +25,12 @@  static inline void rte_pause(void)
 
 #ifdef RTE_WAIT_UNTIL_EQUAL_ARCH_DEFINED
 
-/* Send an event to quit WFE. */
+/* Send a local event to quit WFE. */
 #define __RTE_ARM_SEVL() { asm volatile("sevl" : : : "memory"); }
 
+/* Send a global event to quit WFE for all cores. */
+#define __RTE_ARM_SEV() { asm volatile("sev" : : : "memory"); }
+
 /* Put processor into low power WFE(Wait For Event) state. */
 #define __RTE_ARM_WFE() { asm volatile("wfe" : : : "memory"); }
 
diff --git a/lib/eal/arm/rte_cpuflags.c b/lib/eal/arm/rte_cpuflags.c
index 93461191c7..90b80709fd 100644
--- a/lib/eal/arm/rte_cpuflags.c
+++ b/lib/eal/arm/rte_cpuflags.c
@@ -163,4 +163,9 @@  void
 rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
 {
 	memset(intrinsics, 0, sizeof(*intrinsics));
+
+#ifdef RTE_ARM_USE_WFE
+	intrinsics->power_monitor = 1;
+#endif
+
 }
diff --git a/lib/eal/arm/rte_power_intrinsics.c b/lib/eal/arm/rte_power_intrinsics.c
index 13f6a3264d..d7d8d7af2f 100644
--- a/lib/eal/arm/rte_power_intrinsics.c
+++ b/lib/eal/arm/rte_power_intrinsics.c
@@ -6,17 +6,75 @@ 
 
 #include "rte_power_intrinsics.h"
 
+#ifdef RTE_ARM_USE_WFE
+static inline int
+__check_val_size(const uint8_t sz)
+{
+	switch (sz) {
+	case sizeof(uint8_t):  /* fall-through */
+	case sizeof(uint16_t): /* fall-through */
+	case sizeof(uint32_t): /* fall-through */
+	case sizeof(uint64_t): /* fall-through */
+		return 0;
+	default:
+		/* unexpected size */
+		return -1;
+	}
+}
+#endif
+
 /**
- * This function is not supported on ARM.
+ * This function uses WFE instruction to make lcore suspend
+ * execution on ARM.
+ * Note that timestamp based timeout is not supported yet.
  */
 int
 rte_power_monitor(const struct rte_power_monitor_cond *pmc,
 		const uint64_t tsc_timestamp)
 {
-	RTE_SET_USED(pmc);
 	RTE_SET_USED(tsc_timestamp);
 
+#ifdef RTE_ARM_USE_WFE
+	const unsigned int lcore_id = rte_lcore_id();
+	uint64_t cur_value;
+
+	/* prevent non-EAL thread from using this API */
+	if (lcore_id >= RTE_MAX_LCORE)
+		return -EINVAL;
+
+	if (pmc == NULL)
+		return -EINVAL;
+
+	if (__check_val_size(pmc->size) < 0)
+		return -EINVAL;
+
+	if (pmc->fn == NULL)
+		return -EINVAL;
+
+	switch (pmc->size) {
+	case sizeof(uint8_t):
+		__RTE_ARM_LOAD_EXC_8(pmc->addr, cur_value, __ATOMIC_RELAXED);
+		__RTE_ARM_WFE()
+		break;
+	case sizeof(uint16_t):
+		__RTE_ARM_LOAD_EXC_16(pmc->addr, cur_value, __ATOMIC_RELAXED);
+		__RTE_ARM_WFE()
+		break;
+	case sizeof(uint32_t):
+		__RTE_ARM_LOAD_EXC_32(pmc->addr, cur_value, __ATOMIC_RELAXED);
+		__RTE_ARM_WFE()
+		break;
+	case sizeof(uint64_t):
+		__RTE_ARM_LOAD_EXC_64(pmc->addr, cur_value, __ATOMIC_RELAXED);
+		__RTE_ARM_WFE()
+	}
+
+	return 0;
+#else
+	RTE_SET_USED(pmc);
+
 	return -ENOTSUP;
+#endif
 }
 
 /**
@@ -31,14 +89,22 @@  rte_power_pause(const uint64_t tsc_timestamp)
 }
 
 /**
- * This function is not supported on ARM.
+ * This function uses SEV instruction to wake up all cores
+ * on ARM.
+ * Note that lcore_id is not used here.
  */
 int
 rte_power_monitor_wakeup(const unsigned int lcore_id)
 {
 	RTE_SET_USED(lcore_id);
 
+#ifdef RTE_ARM_USE_WFE
+	__RTE_ARM_SEV()
+
+	return 0;
+#else
 	return -ENOTSUP;
+#endif
 }
 
 int