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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by CO1NAM11FT059.mail.protection.outlook.com (10.13.174.160) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.20 via Frontend Transport; Tue, 8 Nov 2022 08:51:06 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Tue, 8 Nov 2022 00:50:50 -0800 Received: from nvidia.com (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Tue, 8 Nov 2022 00:50:48 -0800 From: Shun Hao To: , , , "Sean Zhang" CC: , , Subject: [PATCH v1] net/mlx5: fix representor item and meter Date: Tue, 8 Nov 2022 10:50:34 +0200 Message-ID: <20221108085034.872530-1-shunh@nvidia.com> X-Mailer: git-send-email 2.20.0 MIME-Version: 1.0 X-Originating-IP: [10.126.230.35] X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT059:EE_|SA3PR12MB8023:EE_ X-MS-Office365-Filtering-Correlation-Id: cc065b85-7873-429b-9282-08dac1665fca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Nov 2022 08:51:06.3345 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc065b85-7873-429b-9282-08dac1665fca X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8023 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When creating flow matching port representor item with meter action, it will fail due to incorrect parsing the item. This patch fixes this issue by adding the correct item parse for port representor in validation. Fixes: 707d5e7d79 ("net/mlx5: support flow matching on representor ID") Cc: stable@dpdk.org Signed-off-by: Shun Hao Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_flow.c | 50 ++++++++++++++++++++------------- drivers/net/mlx5/mlx5_flow_dv.c | 6 ++++ 2 files changed, 37 insertions(+), 19 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index ea88882b88..f67bfce515 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -5469,6 +5469,7 @@ flow_meter_split_prep(struct rte_eth_dev *dev, switch (item_type) { case RTE_FLOW_ITEM_TYPE_PORT_ID: case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + case RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR: if (mlx5_flow_get_item_vport_id(dev, items, &flow_src_port, NULL, error)) return -rte_errno; if (!fm->def_policy && wks->policy->is_hierarchy && @@ -5483,11 +5484,6 @@ flow_meter_split_prep(struct rte_eth_dev *dev, memcpy(sfx_items, items, sizeof(*sfx_items)); sfx_items++; break; - case RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR: - flow_src_port = 0; - memcpy(sfx_items, items, sizeof(*sfx_items)); - sfx_items++; - break; case RTE_FLOW_ITEM_TYPE_VLAN: /* Determine if copy vlan item below. */ vlan_item_src = items; @@ -11402,27 +11398,43 @@ int mlx5_flow_get_item_vport_id(struct rte_eth_dev *dev, struct rte_flow_error *error) { struct mlx5_priv *port_priv; - const struct rte_flow_item_port_id *pid_v; + const struct rte_flow_item_port_id *pid_v = NULL; + const struct rte_flow_item_ethdev *dev_v = NULL; uint32_t esw_mgr_port; + uint32_t src_port; - if (item->type != RTE_FLOW_ITEM_TYPE_PORT_ID && - item->type != RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) + if (all_ports) + *all_ports = false; + switch (item->type) { + case RTE_FLOW_ITEM_TYPE_PORT_ID: + pid_v = item->spec; + if (!pid_v) + return 0; + src_port = pid_v->id; + esw_mgr_port = MLX5_PORT_ESW_MGR; + break; + case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT: + dev_v = item->spec; + if (!dev_v) { + if (all_ports) + *all_ports = true; + return 0; + } + src_port = dev_v->port_id; + esw_mgr_port = MLX5_REPRESENTED_PORT_ESW_MGR; + break; + case RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR: + src_port = MLX5_REPRESENTED_PORT_ESW_MGR; + esw_mgr_port = MLX5_REPRESENTED_PORT_ESW_MGR; + break; + default: return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL, "Incorrect item type."); - pid_v = item->spec; - if (!pid_v) { - if (all_ports) - *all_ports = (item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT); - return 0; } - if (all_ports) - *all_ports = false; - esw_mgr_port = (item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) ? - MLX5_REPRESENTED_PORT_ESW_MGR : MLX5_PORT_ESW_MGR; - if (pid_v->id == esw_mgr_port) { + if (src_port == esw_mgr_port) { *vport_id = mlx5_flow_get_esw_manager_vport_id(dev); } else { - port_priv = mlx5_port_to_eswitch_info(pid_v->id, false); + port_priv = mlx5_port_to_eswitch_info(src_port, false); if (!port_priv) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL, "Failed to get port info."); diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index acd7ea8b79..6ce87e310b 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -17056,6 +17056,9 @@ __flow_dv_create_policy_flow(struct rte_eth_dev *dev, if (item && item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) ret = flow_dv_translate_item_represented_port(dev, value.buf, item, attr, MLX5_SET_MATCHER_SW_V); + else if (item && item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR) + ret = flow_dv_translate_item_port_representor(dev, value.buf, + MLX5_SET_MATCHER_SW_V); else ret = flow_dv_translate_item_port_id(dev, value.buf, item, attr, MLX5_SET_MATCHER_SW_V); @@ -17110,6 +17113,9 @@ __flow_dv_create_policy_matcher(struct rte_eth_dev *dev, if (item && item->type == RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT) ret = flow_dv_translate_item_represented_port(dev, matcher.mask.buf, item, attr, MLX5_SET_MATCHER_SW_M); + else if (item && item->type == RTE_FLOW_ITEM_TYPE_PORT_REPRESENTOR) + ret = flow_dv_translate_item_port_representor(dev, matcher.mask.buf, + MLX5_SET_MATCHER_SW_M); else ret = flow_dv_translate_item_port_id(dev, matcher.mask.buf, item, attr, MLX5_SET_MATCHER_SW_M);