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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.160 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.160) by DM6NAM11FT033.mail.protection.outlook.com (10.13.172.221) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.20 via Frontend Transport; Mon, 7 Nov 2022 10:29:24 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Mon, 7 Nov 2022 02:29:17 -0800 Received: from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 7 Nov 2022 02:29:15 -0800 From: Dariusz Sosnowski To: Matan Azrad , Viacheslav Ovsiienko CC: , Raslan Darawsheh , Subject: [PATCH] net/mlx5: fix hairpin split with set VLAN VID action Date: Mon, 7 Nov 2022 10:28:52 +0000 Message-ID: <20221107102852.365631-1-dsosnowski@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT033:EE_|DM4PR12MB7504:EE_ X-MS-Office365-Filtering-Correlation-Id: 1bd511f6-f100-4320-e216-08dac0aaf0fd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2022 10:29:24.5083 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1bd511f6-f100-4320-e216-08dac0aaf0fd X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT033.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB7504 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Before this patch any flow rule which works on hairpin queues and which has OF_SET_VLAN_VID action was split into 2 flow rules: - one subflow for Rx, - one subflow for Tx. OF_SET_VLAN_VID action was always placed in the Tx subflow. Assuming a flow rule which matches VLAN traffic and has both OF_SET_VLAN_VID action, and MODIFY_FIELD action on VLAN VID, but no OF_PUSH_VLAN action, the following happened: - MODIFY_FIELD action was placed in Rx subflow, - OF_SET_VLAN_VID action was placed in Tx subflow, - OF_SET_VLAN_VID action is internally compiled to a header modify command. This caused the following issues: 1. Since OF_SET_VLAN_VID was placed in Tx subflow, 2 header modify actions were allocated. One for Rx and one for Tx. 2. If OF_SET_VLAN_VID action was placed before MODIFY_FIELD on VLAN VID, the flow rule executed header modifications in reverse order. MODIFY_FIELD actions were executed first in the Rx subflow and OF_SET_VLAN_VID was executed second in Tx subflow. This patch fixes this behavior by not splitting hairpin flow rules if OF_SET_VLAN_VID action is used without OF_PUSH_VLAN. On top of that, if flow rule is split, the OF_SET_VLAN_VID action is not moved to Tx subflow (for flow rules mentioned above). Fixes: 210008309b45 ("net/mlx5: fix VLAN push action on hairpin queue") Cc: stable@dpdk.org Signed-off-by: Dariusz Sosnowski Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/mlx5_flow.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c index 65af1b4dd5..ea88882b88 100644 --- a/drivers/net/mlx5/mlx5_flow.c +++ b/drivers/net/mlx5/mlx5_flow.c @@ -4591,6 +4591,7 @@ flow_check_hairpin_split(struct rte_eth_dev *dev, int queue_action = 0; int action_n = 0; int split = 0; + int push_vlan = 0; const struct rte_flow_action_queue *queue; const struct rte_flow_action_rss *rss; const struct rte_flow_action_raw_encap *raw_encap; @@ -4599,6 +4600,8 @@ flow_check_hairpin_split(struct rte_eth_dev *dev, if (!attr->ingress) return 0; for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { + if (actions->type == RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN) + push_vlan = 1; switch (actions->type) { case RTE_FLOW_ACTION_TYPE_QUEUE: queue = actions->conf; @@ -4623,11 +4626,15 @@ flow_check_hairpin_split(struct rte_eth_dev *dev, case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: - case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: split++; action_n++; break; + case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: + if (push_vlan) + split++; + action_n++; + break; case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: raw_encap = actions->conf; if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) @@ -5088,19 +5095,32 @@ flow_hairpin_split(struct rte_eth_dev *dev, struct mlx5_rte_flow_item_tag *tag_item; struct rte_flow_item *item; char *addr; + int push_vlan = 0; int encap = 0; for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { + if (actions->type == RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN) + push_vlan = 1; switch (actions->type) { case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: - case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); actions_tx++; break; + case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: + if (push_vlan) { + rte_memcpy(actions_tx, actions, + sizeof(struct rte_flow_action)); + actions_tx++; + } else { + rte_memcpy(actions_rx, actions, + sizeof(struct rte_flow_action)); + actions_rx++; + } + break; case RTE_FLOW_ACTION_TYPE_COUNT: if (encap) { rte_memcpy(actions_tx, actions,