diff mbox series

[v1] net/mlx5: fix incorrect match mask for meter flow

Message ID 20221103153327.73170-1-shunh@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series [v1] net/mlx5: fix incorrect match mask for meter flow |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/github-robot: build success github build: passed
ci/intel-Testing success Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Shun Hao Nov. 3, 2022, 3:33 p.m. UTC 
  There's an issue introduced by the change of splitting item matcher
and value translation, that the matcher mask value for color is not
set correctly in meter policy flow creation.

This patch fixes this by providing the correct color mask.

Fixes: cd4ab74206 ("net/mlx5: split flow item matcher and value translation")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Raslan Darawsheh Nov. 6, 2022, 11:09 a.m. UTC | #1 
Hi,

> -----Original Message-----
> From: Shun Hao <shunh@nvidia.com>
> Sent: Thursday, November 3, 2022 5:33 PM
> To: Slava Ovsiienko <viacheslavo@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>;
> stable@dpdk.org
> Subject: [PATCH v1] net/mlx5: fix incorrect match mask for meter flow
> 
> There's an issue introduced by the change of splitting item matcher
> and value translation, that the matcher mask value for color is not
> set correctly in meter policy flow creation.
> 
> This patch fixes this by providing the correct color mask.
> 
> Fixes: cd4ab74206 ("net/mlx5: split flow item matcher and value translation")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Shun Hao <shunh@nvidia.com>
> Acked-by: Matan Azrad <matan@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7b904eeed6..0b1ff89d35 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9727,8 +9727,8 @@  flow_dv_translate_item_mpls(void *key, const struct rte_flow_item *item,
  *   Flow matcher value.
  * @param[in] reg_type
  *   Type of device metadata register
- * @param[in] value
- *   Register value
+ * @param[in] data
+ *   Register data
  * @param[in] mask
  *   Register mask
  */
@@ -17132,7 +17132,7 @@  __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
 	tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
 	if (priority < RTE_COLOR_RED)
 		flow_dv_match_meta_reg(matcher.mask.buf,
-			(enum modify_reg)color_reg_c_idx, 0, color_mask);
+			(enum modify_reg)color_reg_c_idx, color_mask, color_mask);
 	matcher.priority = priority;
 	matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
 				    matcher.mask.size);