diff mbox series

[v6,01/18] net/mlx5: fix invalid flow attributes

Message ID	20221020154152.28228-2-suanmingm@nvidia.com (mailing list archive)
State	Accepted, archived
Delegated to:	Raslan Darawsheh
Headers	Received-SPF: None (protection.outlook.com: nvidia.com does not designate permitted sender hosts) From: Suanming Mou <suanmingm@nvidia.com> To: Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com> CC: <dev@dpdk.org>, <rasland@nvidia.com>, <orika@nvidia.com> Subject: [PATCH v6 01/18] net/mlx5: fix invalid flow attributes Date: Thu, 20 Oct 2022 18:41:35 +0300 Message-ID: <20221020154152.28228-2-suanmingm@nvidia.com> In-Reply-To: <20221020154152.28228-1-suanmingm@nvidia.com> References: <20220923144334.27736-1-suanmingm@nvidia.com> <20221020154152.28228-1-suanmingm@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: list Errors-To: dev-bounces@dpdk.org
Series	net/mlx5: HW steering PMD update \| [v6,00/18] net/mlx5: HW steering PMD update [v6,01/18] net/mlx5: fix invalid flow attributes [v6,02/18] net/mlx5: fix IPv6 and TCP RSS hash fields [v6,03/18] net/mlx5: add shared header reformat support [v6,04/18] net/mlx5: add modify field hws support [v6,05/18] net/mlx5: add HW steering port action [v6,06/18] net/mlx5: add extended metadata mode for hardware steering [v6,07/18] net/mlx5: add HW steering meter action [v6,08/18] net/mlx5: add HW steering counter action [v6,09/18] net/mlx5: support DR action template API [v6,10/18] net/mlx5: add HW steering connection tracking support [v6,11/18] net/mlx5: add HW steering VLAN push, pop and VID modify flow actions [v6,12/18] net/mlx5: implement METER MARK indirect action for HWS [v6,13/18] net/mlx5: add HWS AGE action support [v6,14/18] net/mlx5: add async action push and pull support [v6,15/18] net/mlx5: support flow integrity in HWS group 0 [v6,16/18] net/mlx5: support device control for E-Switch default rule [v6,17/18] net/mlx5: support device control of representor matching [v6,18/18] net/mlx5: create control flow rules with HWS

Checks

Context	Check	Description
ci/checkpatch	success	coding style OK
ci/iol-testing	warning	apply patch failure

Commit Message

Suanming Mou Oct. 20, 2022, 3:41 p.m. UTC

  In the function flow_get_drv_type(), attr will be read in non-HWS mode.
In case user call the HWS API in SWS mode, attr should be placed in
HWS functions, or it will cause crash.

Fixes: c40c061a022e ("net/mlx5: add basic flow queue operation")

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow.c | 38 ++++++++++++++++++++++++------------
 1 file changed, 26 insertions(+), 12 deletions(-)

Comments

Slava Ovsiienko Oct. 24, 2022, 9:43 a.m. UTC | #1

> -----Original Message-----
> From: Suanming Mou <suanmingm@nvidia.com>
> Sent: Thursday, October 20, 2022 18:42
> To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>; Ori Kam
> <orika@nvidia.com>
> Subject: [PATCH v6 01/18] net/mlx5: fix invalid flow attributes
> 
> In the function flow_get_drv_type(), attr will be read in non-HWS mode.
> In case user call the HWS API in SWS mode, attr should be placed in HWS
> functions, or it will cause crash.
> 
> Fixes: c40c061a022e ("net/mlx5: add basic flow queue operation")
> 
> Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 1e32031443..eb8faf90f7 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -3742,6 +3742,8 @@  flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
 	 */
 	if (priv->sh->config.dv_flow_en == 2)
 		return MLX5_FLOW_TYPE_HW;
+	if (!attr)
+		return MLX5_FLOW_TYPE_MIN;
 	/* If no OS specific type - continue with DV/VERBS selection */
 	if (attr->transfer && priv->sh->config.dv_esw_en)
 		type = MLX5_FLOW_TYPE_DV;
@@ -8254,8 +8256,9 @@  mlx5_flow_info_get(struct rte_eth_dev *dev,
 		   struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8289,8 +8292,9 @@  mlx5_flow_port_configure(struct rte_eth_dev *dev,
 			 struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8321,8 +8325,9 @@  mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
 		struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr fattr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
+	if (flow_get_drv_type(dev, &fattr) != MLX5_FLOW_TYPE_HW) {
 		rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8352,8 +8357,9 @@  mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
 				   struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8387,8 +8393,9 @@  mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
 			struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr fattr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
+	if (flow_get_drv_type(dev, &fattr) != MLX5_FLOW_TYPE_HW) {
 		rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8418,8 +8425,9 @@  mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
 				   struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8459,8 +8467,9 @@  mlx5_flow_table_create(struct rte_eth_dev *dev,
 		       struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr fattr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
+	if (flow_get_drv_type(dev, &fattr) != MLX5_FLOW_TYPE_HW) {
 		rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8496,8 +8505,9 @@  mlx5_flow_table_destroy(struct rte_eth_dev *dev,
 			struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8544,8 +8554,9 @@  mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
 			    struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr fattr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
+	if (flow_get_drv_type(dev, &fattr) != MLX5_FLOW_TYPE_HW) {
 		rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8587,8 +8598,9 @@  mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
 			     struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr fattr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &fattr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8623,8 +8635,9 @@  mlx5_flow_pull(struct rte_eth_dev *dev,
 	       struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,
@@ -8652,8 +8665,9 @@  mlx5_flow_push(struct rte_eth_dev *dev,
 	       struct rte_flow_error *error)
 {
 	const struct mlx5_flow_driver_ops *fops;
+	struct rte_flow_attr attr = {0};
 
-	if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
+	if (flow_get_drv_type(dev, &attr) != MLX5_FLOW_TYPE_HW)
 		return rte_flow_error_set(error, ENOTSUP,
 				RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 				NULL,