From patchwork Wed Oct 19 00:39:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 118457 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DC601A0560; Tue, 18 Oct 2022 18:45:04 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8CF6042BC5; Tue, 18 Oct 2022 18:43:12 +0200 (CEST) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by mails.dpdk.org (Postfix) with ESMTP id 0FA454161A for ; Tue, 18 Oct 2022 18:42:58 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666111379; x=1697647379; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sk7ibhp6Waz1pS+sfnRESBiRcUuM6Jbxdy2qX8akelw=; b=AaBBFpA8LD6BKCIuQP/gEbBzZChqSXDvsU2yt6d7Y/KSPPcwTA6WfTMo +TOkOt5pzkoKcJsSkasHE27GHsdhiD4+C5/Iwcuk7dT0NVhi8uqGWczmm GlvCGaWHdZD61fNoCru8vCiLE3LFVsTh7SGh1eusU9+iKydzjWSMDP5rg bwUL0tm0xwqzc4ooT6jWq0q4RXsjYA17y7WlutP5tXS6XGJQTfxY3Teh+ GqB2779wLpcRQhio6BZFMRjwINNe6jk3nZizWumtpQRLsCDY2Rpn1I9wQ qem1mgipOrZqRGkeemMdT54W8IdueuVJtA97Ky83XvfQmTxQ6DDtZY4hY g==; X-IronPort-AV: E=McAfee;i="6500,9779,10504"; a="368192122" X-IronPort-AV: E=Sophos;i="5.95,193,1661842800"; d="scan'208";a="368192122" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Oct 2022 09:42:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10504"; a="803836128" X-IronPort-AV: E=Sophos;i="5.95,193,1661842800"; d="scan'208";a="803836128" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga005.jf.intel.com with ESMTP; 18 Oct 2022 09:42:58 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com, maxime.coquelin@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v4 22/30] baseband/acc100: add queue stop operation Date: Tue, 18 Oct 2022 17:39:10 -0700 Message-Id: <20221019003918.257506-23-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20221019003918.257506-1-hernan.vargas@intel.com> References: <20221019003918.257506-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Implement new feature to stop queue operation. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc/rte_acc100_pmd.c | 60 +++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c index a734be8553..7d392bfba7 100644 --- a/drivers/baseband/acc/rte_acc100_pmd.c +++ b/drivers/baseband/acc/rte_acc100_pmd.c @@ -799,6 +799,65 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id, return 0; } +static inline void +acc100_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type, + uint16_t index) +{ + if (op == NULL) + return; + if (op_type == RTE_BBDEV_OP_LDPC_DEC) + rte_bbdev_log(DEBUG, + " Op 5GUL %d %d %d %d %d %d %d %d %d %d %d %d", + index, + op->ldpc_dec.basegraph, op->ldpc_dec.z_c, + op->ldpc_dec.n_cb, op->ldpc_dec.q_m, + op->ldpc_dec.n_filler, op->ldpc_dec.cb_params.e, + op->ldpc_dec.op_flags, op->ldpc_dec.rv_index, + op->ldpc_dec.iter_max, op->ldpc_dec.iter_count, + op->ldpc_dec.harq_combined_input.length + ); + else if (op_type == RTE_BBDEV_OP_LDPC_ENC) { + struct rte_bbdev_enc_op *op_dl = (struct rte_bbdev_enc_op *) op; + rte_bbdev_log(DEBUG, + " Op 5GDL %d %d %d %d %d %d %d %d %d", + index, + op_dl->ldpc_enc.basegraph, op_dl->ldpc_enc.z_c, + op_dl->ldpc_enc.n_cb, op_dl->ldpc_enc.q_m, + op_dl->ldpc_enc.n_filler, op_dl->ldpc_enc.cb_params.e, + op_dl->ldpc_enc.op_flags, op_dl->ldpc_enc.rv_index + ); + } +} + +static int +acc100_queue_stop(struct rte_bbdev *dev, uint16_t queue_id) +{ + struct acc_queue *q; + struct rte_bbdev_dec_op *op; + uint16_t i; + + q = dev->data->queues[queue_id].queue_private; + rte_bbdev_log(INFO, "Queue Stop %d H/T/D %d %d %x OpType %d", + queue_id, q->sw_ring_head, q->sw_ring_tail, + q->sw_ring_depth, q->op_type); + for (i = 0; i < q->sw_ring_depth; ++i) { + op = (q->ring_addr + i)->req.op_addr; + acc100_print_op(op, q->op_type, i); + } + /* ignore all operations in flight and clear counters */ + q->sw_ring_tail = q->sw_ring_head; + q->aq_enqueued = 0; + q->aq_dequeued = 0; + dev->data->queues[queue_id].queue_stats.enqueued_count = 0; + dev->data->queues[queue_id].queue_stats.dequeued_count = 0; + dev->data->queues[queue_id].queue_stats.enqueue_err_count = 0; + dev->data->queues[queue_id].queue_stats.dequeue_err_count = 0; + dev->data->queues[queue_id].queue_stats.enqueue_warn_count = 0; + dev->data->queues[queue_id].queue_stats.dequeue_warn_count = 0; + + return 0; +} + /* Release ACC100 queue */ static int acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id) @@ -991,6 +1050,7 @@ static const struct rte_bbdev_ops acc100_bbdev_ops = { .info_get = acc100_dev_info_get, .queue_setup = acc100_queue_setup, .queue_release = acc100_queue_release, + .queue_stop = acc100_queue_stop, .queue_intr_enable = acc100_queue_intr_enable, .queue_intr_disable = acc100_queue_intr_disable };