From patchwork Fri Oct 14 05:43:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 118185 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03058A00C2; Fri, 14 Oct 2022 07:44:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D7C0C42C3C; Fri, 14 Oct 2022 07:43:44 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id CA04542C16 for ; Fri, 14 Oct 2022 07:43:42 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29E2JGUq005517 for ; Thu, 13 Oct 2022 22:43:42 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=zJG6MkiXiMJnwzB5Bd+wSO/zOBkPXbaYk95G38zkyG0=; b=VPMwqzeGbfxbxkPS+SI3uJ6Gs9h5YhASIimcuURQauMs+glC0gguyxoVShnbNzAhJ+OW waJmmqixfpU0aoBO+dlz7YB9qtv23G3y6tOIadoHplrzBK8VsAvJj8HO5Xj4YXkp0MrQ GwIrEIn3In+C34xohCO8uxmDq5lcgSnYi1Ny25wNfAiJ0j/OcMUYH0kQVJHCPxEetEvl 2PDV2UZt/42gL/nIuj1w73b696XZk1RxdqCBsi/uZJgYtvEvxsh0GH8r6i6SL+zr5Qdn L+0c8BF8fiefitG1scSbIIdQ2hpA0188dYDXXwG6GpAKXmuI2vcKrhn9k3NSVhE1LV/w Aw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k6xvp0k7d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 13 Oct 2022 22:43:41 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 13 Oct 2022 22:43:40 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 13 Oct 2022 22:43:40 -0700 Received: from localhost.localdomain (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 4F29C3F7048; Thu, 13 Oct 2022 22:43:38 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH v3 08/13] common/cnxk: set hysteresis bit to one Date: Fri, 14 Oct 2022 11:13:12 +0530 Message-ID: <20221014054317.1151306-8-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221014054317.1151306-1-ndabilpuram@marvell.com> References: <20221011120135.45846-1-ndabilpuram@marvell.com> <20221014054317.1151306-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 3jgRvGp6hWvwmYQtYOcK_wZUMvBdECY_ X-Proofpoint-GUID: 3jgRvGp6hWvwmYQtYOcK_wZUMvBdECY_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-14_02,2022-10-13_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao Setting non zero FC_HYST_BITS to reduce mesh traffic on HW. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 7318f26b57..1cb1fd2101 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -940,7 +940,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) else aura.fc_stype = 0x3; /* STSTP */ aura.fc_addr = (uint64_t)sq->fc; - aura.fc_hyst_bits = 0; /* Store count on all updates */ + aura.fc_hyst_bits = 1; /* Store count on all updates */ rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, &pool, 0); if (rc)