From patchwork Mon Sep 26 22:55:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sevincer, Abdullah" X-Patchwork-Id: 116914 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 833A9A00C2; Tue, 27 Sep 2022 00:55:57 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 465B6427FF; Tue, 27 Sep 2022 00:55:47 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id 01DE84113F for ; Tue, 27 Sep 2022 00:55:44 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664232945; x=1695768945; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fEcc1VsWRe+dkbfKigdMRZ7ibY+2QiTT5nCouS0SBYQ=; b=JKOCcpYQ8i9XH5YghKlQ0bkFjVD+mfUX53wUL6K/HdHJW3wCqRsok9hr A2ZZcWWfZPyUwuboKQ7yiVx6nwaNH/TqLv3d4xn0RfCj1Jd/VCm6UXbXT wQ68YCAeKRAoPOK02plibJ2ar/1pLKDaYw5dZuJbabWfRtP1rY7gSKYwJ m84l3fMgkPomVp/6jATfdiTE+rY46fSjLpZN5pN5UNvTyy2INsdDOHKVa r2vP3uidmubyaoG4AzZ7XGyZvulFtJZH5xeC7u7MES/p9R8XOl4s8jUS8 aFwZux0YpFpbDpx0XCkDlT5eMPEb7z4scW8wVVKAt72dBuV4BKTTWJVA7 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="302067155" X-IronPort-AV: E=Sophos;i="5.93,347,1654585200"; d="scan'208";a="302067155" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Sep 2022 15:55:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10482"; a="746807162" X-IronPort-AV: E=Sophos;i="5.93,347,1654585200"; d="scan'208";a="746807162" Received: from txanpdk02.an.intel.com ([10.123.117.76]) by orsmga004.jf.intel.com with ESMTP; 26 Sep 2022 15:55:43 -0700 From: Abdullah Sevincer To: dev@dpdk.org Cc: jerinj@marvell.com, rashmi.shetty@intel.com, pravin.pathak@intel.com, mike.ximing.chen@intel.com, timothy.mcdaniel@intel.com, shivani.doneria@intel.com, tirthendu.sarkar@intel.com, Abdullah Sevincer Subject: [PATCH v3 3/3] event/dlb2: optimize credit allocations Date: Mon, 26 Sep 2022 17:55:36 -0500 Message-Id: <20220926225536.1387161-3-abdullah.sevincer@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220926225536.1387161-1-abdullah.sevincer@intel.com> References: <20220820005957.2986689-2-timothy.mcdaniel@intel.com> <20220926225536.1387161-1-abdullah.sevincer@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This commit implements the changes required for using suggested port type hint feature. Each port uses different credit quanta based on port type specified using port configuration flags. Each port has separate quanta defined in dlb2_priv.h Producer and consumer ports will need larger quanta value to reduce number of credit calls they make. Workers can use small quanta as they mostly work out of locally cached credits and don't request/return credits often. Signed-off-by: Abdullah Sevincer --- drivers/event/dlb2/dlb2.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c index 4dd1d55ddc..164ebbcfe2 100644 --- a/drivers/event/dlb2/dlb2.c +++ b/drivers/event/dlb2/dlb2.c @@ -1965,8 +1965,8 @@ dlb2_eventdev_port_setup(struct rte_eventdev *dev, { struct dlb2_eventdev *dlb2; struct dlb2_eventdev_port *ev_port; - int ret; uint32_t hw_credit_quanta, sw_credit_quanta; + int ret; if (dev == NULL || port_conf == NULL) { DLB2_LOG_ERR("Null parameter\n"); @@ -2067,6 +2067,24 @@ dlb2_eventdev_port_setup(struct rte_eventdev *dev, ev_port->inflight_credits = 0; ev_port->dlb2 = dlb2; /* reverse link */ + /* Default for worker ports */ + sw_credit_quanta = dlb2->sw_credit_quanta; + hw_credit_quanta = dlb2->hw_credit_quanta; + + if (port_conf->event_port_cfg & RTE_EVENT_PORT_CFG_HINT_PRODUCER) { + /* Producer type ports. Mostly enqueue */ + sw_credit_quanta = DLB2_SW_CREDIT_P_QUANTA_DEFAULT; + hw_credit_quanta = DLB2_SW_CREDIT_P_BATCH_SZ; + } + if (port_conf->event_port_cfg & RTE_EVENT_PORT_CFG_HINT_CONSUMER) { + /* Consumer type ports. Mostly dequeue */ + sw_credit_quanta = DLB2_SW_CREDIT_C_QUANTA_DEFAULT; + hw_credit_quanta = DLB2_SW_CREDIT_C_BATCH_SZ; + } + ev_port->credit_update_quanta = sw_credit_quanta; + ev_port->qm_port.hw_credit_quanta = hw_credit_quanta; + + /* Tear down pre-existing port->queue links */ if (dlb2->run_state == DLB2_RUN_STATE_STOPPED) dlb2_port_link_teardown(dlb2, &dlb2->ev_ports[ev_port_id]);