From patchwork Sat Aug 20 02:31:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 115291 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4BAA9A034C; Fri, 19 Aug 2022 20:39:50 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D5F1942C08; Fri, 19 Aug 2022 20:36:44 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id D7EC742B76; Fri, 19 Aug 2022 20:36:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660934187; x=1692470187; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d15Pgho5O5bcDek1u0JYE0pkETreYOhLPj7j0iwdNW4=; b=LBEYaJPf9VoCZ3iZPI6OyW32vGEi9V7MdEdupS8W9J8a69ZNDttLAt/R iYideOyXyL5Fi1+ydjHE1XoQg/j+XDLXns3Co+xB/baWGA5A/9+RmP9MS G7gR54H5akFAlV/oaUVQFks+ZVb4dsgYVFkUbXkPYjAldwYoRuW+kQIWj 55jPE4GeINdI+tPd813cD8kbnDKjvPfkRI2xlVlQVcigfQVlVH2gmfsEo 4Hty9CHwYDyDBur3UcYcmoS3QkyPhddz/PO08AeZuF12AozOKTM24XdD1 iPq8H1cvUd2fvG8/fhdeHAbl1aRcARjE1caax5K9Iub4XYc8GlpU+IU19 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10444"; a="319107325" X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="319107325" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2022 11:36:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="608296360" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga002.jf.intel.com with ESMTP; 19 Aug 2022 11:36:26 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas , stable@dpdk.org Subject: [PATCH v2 33/37] baseband/acc100: set device min alignment to 1 Date: Fri, 19 Aug 2022 19:31:53 -0700 Message-Id: <20220820023157.189047-34-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com> References: <20220820023157.189047-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Historical mistakes, there should be no 64B alignment requirement for the buffer being processed. Any 1B alignment is sufficient. Fixes: 9200ffa5cd5 ("baseband/acc100: add info get function") Cc: stable@dpdk.org Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc100/rte_acc100_pmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index 0e72bc1f57..461ebe67cd 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -1201,7 +1201,7 @@ acc100_dev_info_get(struct rte_bbdev *dev, d->acc100_conf.q_ul_4g.num_qgroups - 1; dev_info->default_queue_conf = default_queue_conf; dev_info->cpu_flag_reqs = NULL; - dev_info->min_alignment = 64; + dev_info->min_alignment = 1; dev_info->capabilities = bbdev_capabilities; #ifdef ACC100_EXT_MEM dev_info->harq_buffer_size = d->ddr_size;