From patchwork Sat Aug 20 02:31:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hernan Vargas X-Patchwork-Id: 115281 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 59612A034C; Fri, 19 Aug 2022 20:38:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 60FA742BC9; Fri, 19 Aug 2022 20:36:36 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mails.dpdk.org (Postfix) with ESMTP id B240742B74 for ; Fri, 19 Aug 2022 20:36:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660934182; x=1692470182; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=isCIUOBNu8ARrO3QLdCeQdhiFrA4qlL//3OavMoBqC0=; b=LFSlP6M9krN9lDz6+9+XN6oPWtsIsyyuP40ZxQ1UnlduJ5QDw1p6QJne KFPzBB9EUOw0nA2nsxITfbgq8HDk6zRyQ2LozSo/CZ0X4Eu+Ccl2EqzWv rxLeSCbb/o9Z3R5DF/bSBBOPTEzOemNi0xwd1nU7aoPE5o5i1bmI8WF7+ OIqVDL2rZubV1iaLSZarhLsjoTfz/brY2aaMNcWXuPw4+EnapczFuEvPh TKh8QaDwv1bzVwy4lOCKOLlYbRzfCyhRrH6h865Y9NJkRBQIIE2pDvLNI ymKSZAAwPay5ujbtKHZ8YkP648jOqE7y8rP/zhnSOzNA6p+nVjr8BB+yl g==; X-IronPort-AV: E=McAfee;i="6500,9779,10444"; a="319107290" X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="319107290" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Aug 2022 11:36:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,248,1654585200"; d="scan'208";a="608296323" Received: from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103]) by orsmga002.jf.intel.com with ESMTP; 19 Aug 2022 11:36:21 -0700 From: Hernan Vargas To: dev@dpdk.org, gakhil@marvell.com, trix@redhat.com Cc: nicolas.chautru@intel.com, qi.z.zhang@intel.com, Hernan Vargas Subject: [PATCH v2 23/37] baseband/acc100: update uplink CB input length Date: Fri, 19 Aug 2022 19:31:43 -0700 Message-Id: <20220820023157.189047-24-hernan.vargas@intel.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220820023157.189047-1-hernan.vargas@intel.com> References: <20220820023157.189047-1-hernan.vargas@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Use the FCW E parameter for rate matching as the code block input length. Signed-off-by: Hernan Vargas Reviewed-by: Maxime Coquelin --- drivers/baseband/acc100/rte_acc100_pmd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c index d67495ac52..0389768a6f 100644 --- a/drivers/baseband/acc100/rte_acc100_pmd.c +++ b/drivers/baseband/acc100/rte_acc100_pmd.c @@ -2163,7 +2163,7 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op, crc24_overlap = 24; /* Compute some LDPC BG lengths */ - input_length = dec->cb_params.e; + input_length = fcw->rm_e; if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_LLR_COMPRESSION)) input_length = (input_length * 3 + 3) / 4;