Checks
Context | Check | Description |
---|---|---|
ci/checkpatch | success | coding style OK |
Commit Message
Qi Zhang
Aug. 15, 2022, 7:12 a.m. UTC
Add PHY 56G destination address. PHY56G is a single device incorporating all SerDes lanes Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sbq_cmd.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/net/ice/base/ice_sbq_cmd.h b/drivers/net/ice/base/ice_sbq_cmd.h index a5fe43bf26..76c718b252 100644 --- a/drivers/net/ice/base/ice_sbq_cmd.h +++ b/drivers/net/ice/base/ice_sbq_cmd.h @@ -48,6 +48,7 @@ struct ice_sbq_evt_desc { }; enum ice_sbq_msg_dev { + phy_56g = 0x02, rmn_0 = 0x02, rmn_1 = 0x03, rmn_2 = 0x04,