From patchwork Tue Aug 9 18:48:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 114768 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id C3D42A04FD; Tue, 9 Aug 2022 20:50:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2D22C42BD4; Tue, 9 Aug 2022 20:49:58 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 6375842BD2 for ; Tue, 9 Aug 2022 20:49:56 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 279DD0Cj015646 for ; Tue, 9 Aug 2022 11:49:55 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=kbuGTC/alYQJ+Op4VxB+aK67/Myv+Megi50QemqKCSM=; b=A6mtx9tZB7oETPMMwX5Dnw86IAdaPBV6n05Vm4sU3uICF2QofuQA9bgL6pEM5YoFzFbm Kvw00EtcSXBOwbdDrfmldBvA65J7pftRNn9FYjwhGjptmnbUYjaUDCggyhAQxahTeiIA bkRObFVsJXm0E5Im4qhJxmiZE7PdW7JjfomkWH1wfJbJXM5Ijse94tVMFqmIHhCavHIk zwzdaNBAHHUbC0GD/N+DqfyZP4bQzIIQTyyq1gntezF8gQ1MMyI6yB4MTTp2gokQ3EUA HMnip/8nrl3Ri2Yf5DgprVXM3xt7qnAcGvkMB7FBW7VjrAr2+j5y5hZlElnhsAn+qqoE Jw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3huds2ukqh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Aug 2022 11:49:55 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 9 Aug 2022 11:49:54 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 9 Aug 2022 11:49:53 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 198663F7086; Tue, 9 Aug 2022 11:49:51 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 04/23] net/cnxk: fix missing fc wait for outbound path in vec mode Date: Wed, 10 Aug 2022 00:18:48 +0530 Message-ID: <20220809184908.24030-4-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220809184908.24030-1-ndabilpuram@marvell.com> References: <20220809184908.24030-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: x0KwGZEgjR4F4JNMKEU4G9O3u7WsNFr3 X-Proofpoint-GUID: x0KwGZEgjR4F4JNMKEU4G9O3u7WsNFr3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Fix missing fc wait for outbound path in vector mode. Currently only poll mode has it. Fixes: 358d02d20a2f ("net/cnxk: support flow control for outbound inline") Cc: ndabilpuram@marvell.com Signed-off-by: Nithin Dabilpuram --- drivers/net/cnxk/cn10k_tx.h | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h index 8056510..07c88a9 100644 --- a/drivers/net/cnxk/cn10k_tx.h +++ b/drivers/net/cnxk/cn10k_tx.h @@ -1049,9 +1049,13 @@ cn10k_nix_xmit_pkts(void *tx_queue, uint64_t *ws, struct rte_mbuf **tx_pkts, /* Submit CPT instructions if any */ if (flags & NIX_TX_OFFLOAD_SECURITY_F) { + uint16_t sec_pkts = ((c_lnum << 1) + c_loff); + /* Reduce pkts to be sent to CPT */ - burst -= ((c_lnum << 1) + c_loff); - cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); + burst -= sec_pkts; + if (flags & NIX_TX_VWQE_F) + cn10k_nix_vwqe_wait_fc(txq, sec_pkts); + cn10k_nix_sec_fc_wait(txq, sec_pkts); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); } @@ -1199,9 +1203,13 @@ cn10k_nix_xmit_pkts_mseg(void *tx_queue, uint64_t *ws, /* Submit CPT instructions if any */ if (flags & NIX_TX_OFFLOAD_SECURITY_F) { + uint16_t sec_pkts = ((c_lnum << 1) + c_loff); + /* Reduce pkts to be sent to CPT */ - burst -= ((c_lnum << 1) + c_loff); - cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); + burst -= sec_pkts; + if (flags & NIX_TX_VWQE_F) + cn10k_nix_vwqe_wait_fc(txq, sec_pkts); + cn10k_nix_sec_fc_wait(txq, sec_pkts); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); } @@ -2753,7 +2761,11 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, uint64_t *ws, /* Submit CPT instructions if any */ if (flags & NIX_TX_OFFLOAD_SECURITY_F) { - cn10k_nix_sec_fc_wait(txq, (c_lnum << 1) + c_loff); + uint16_t sec_pkts = (c_lnum << 1) + c_loff; + + if (flags & NIX_TX_VWQE_F) + cn10k_nix_vwqe_wait_fc(txq, sec_pkts); + cn10k_nix_sec_fc_wait(txq, sec_pkts); cn10k_nix_sec_steorl(c_io_addr, c_lmt_id, c_lnum, c_loff, c_shft); }