From patchwork Tue Aug 9 18:49:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 114776 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D73FAA04FD; Tue, 9 Aug 2022 20:51:02 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9EA9B42C29; Tue, 9 Aug 2022 20:50:39 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 39B3642BD6 for ; Tue, 9 Aug 2022 20:50:36 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 279CZ8Yi017274 for ; Tue, 9 Aug 2022 11:50:35 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=KKzAycGfHspar0UYmWE4miXagNx+cIHCUzXO8n9241I=; b=HzscJpnBeYdj44+Wg0DKG1G15eyE3MGRhsOk5noRIhydZozzsOHoDSIr/oc5cJI94ZMk cp/XLn1cSnLpRgDOTAjL3kooRJVKgRzaiYkaC8OsjnQTI/qqz6XUi8MniXzyu4QS6p2P TiNW+BfMqxTCiVov2S7fNu30gSdlYXpTaHFRqFuJk82aDOSrLcTQWzTta2e8bi7B7Pis 3TpKWG9NWTFTCcAqTUNEbfylt7IVeHonTi1a4tduAjgpZfRqqJpRlCf8A6M3f9aqu1Wk jg7CJpgxZ2PKZRrcu3IRH3j99PB6wsE5MknAnFwGGxSfL98IUhdYLyUJsdgAILempoHr 1Q== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3hudy6ujvq-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Aug 2022 11:50:35 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 9 Aug 2022 11:50:33 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 9 Aug 2022 11:50:32 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 73AEE5B69B3; Tue, 9 Aug 2022 11:50:28 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH 16/23] common/cnxk: updated shaper profile with red algorithm Date: Wed, 10 Aug 2022 00:19:00 +0530 Message-ID: <20220809184908.24030-16-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220809184908.24030-1-ndabilpuram@marvell.com> References: <20220809184908.24030-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: VKM93d4mQGgQWLDsyWYG6a6BbPLRW4AJ X-Proofpoint-ORIG-GUID: VKM93d4mQGgQWLDsyWYG6a6BbPLRW4AJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao Updated shaper profile with user configurable RED algorithm. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix.h | 1 + drivers/common/cnxk/roc_nix_tm_utils.c | 7 +++++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h index 5f5f5f9..8fd5990 100644 --- a/drivers/common/cnxk/roc_nix.h +++ b/drivers/common/cnxk/roc_nix.h @@ -566,6 +566,7 @@ struct roc_nix_tm_shaper_profile { int32_t pkt_len_adj; bool pkt_mode; int8_t accuracy; + uint8_t red_algo; /* Function to free this memory */ void (*free_fn)(void *profile); }; diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index b9b605f..193f9df 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -1236,11 +1236,14 @@ roc_nix_tm_shaper_default_red_algo(struct roc_nix_tm_node *node, struct nix_tm_shaper_profile *profile; struct nix_tm_shaper_data cir, pir; + if (!roc_prof) + return; + profile = (struct nix_tm_shaper_profile *)roc_prof->reserved; - tm_node->red_algo = NIX_REDALG_STD; + tm_node->red_algo = roc_prof->red_algo; /* C0 doesn't support STALL when both PIR & CIR are enabled */ - if (profile && roc_model_is_cn96_cx()) { + if (roc_model_is_cn96_cx()) { nix_tm_shaper_conf_get(profile, &cir, &pir); if (pir.rate && cir.rate)