From patchwork Tue Aug 9 18:48:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 114772 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D7C8CA04FD; Tue, 9 Aug 2022 20:50:35 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EA24D42BDC; Tue, 9 Aug 2022 20:50:34 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 578CA42BD5 for ; Tue, 9 Aug 2022 20:50:33 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 279D8wce015744 for ; Tue, 9 Aug 2022 11:50:32 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=1G7/n8amRYhi8DyLxDkmjC+oAwBjXmmdvnjX4x/p+qQ=; b=ZWMnrTndjX+IzwcWpffADalM6C5SqbwE0VMwUuhIjj/60GEr+L2Wwf+pBtc2oLVV/7mo d2su1C+49IpTb+Gf8rP6/OH+hPnDkTpRVIDyvMjejqRgoBh3n03bo2z8j0GTmiWHdobe +c8MWoChqNWaRyHMsxbabBUga6rlxLjqkHNQ8ifFbueGBmf7TH4PV0qZ4FNcIN+cTR5e ELA3C4EQ3+yF3mpkJKKYQAQBIakOJg+W7CZMC/BxPB8VkYhj5NMBQlnMQEZrB7/zResQ uo9g3JtR6fLP5tmvQ3+sHgvVYGe6PZhdChUdNSTGWNU13C7JZY0xy1q3M295KV7QQ1sK Ug== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3huds2ukv9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 09 Aug 2022 11:50:32 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Tue, 9 Aug 2022 11:50:30 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 9 Aug 2022 11:50:31 -0700 Received: from hyd1588t430.marvell.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id C70BD3F7125; Tue, 9 Aug 2022 11:50:14 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj CC: , , Vidya Sagar Velumuri Subject: [PATCH 12/23] common/cnxk: avoid the use of platform specific APIs Date: Wed, 10 Aug 2022 00:18:56 +0530 Message-ID: <20220809184908.24030-12-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20220809184908.24030-1-ndabilpuram@marvell.com> References: <20220809184908.24030-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: yABMMoVyV_Y9T4686me31rlnmSU3-jt_ X-Proofpoint-GUID: yABMMoVyV_Y9T4686me31rlnmSU3-jt_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-09_05,2022-08-09_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Vidya Sagar Velumuri Replace the use of platform specific APIs with platform independent APIs. Signed-off-by: Vidya Sagar Velumuri --- drivers/common/cnxk/roc_cpt.c | 8 ++++---- drivers/common/cnxk/roc_cpt.h | 2 +- drivers/crypto/cnxk/cn9k_ipsec.c | 8 ++++---- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/common/cnxk/roc_cpt.c b/drivers/common/cnxk/roc_cpt.c index d607bde..6f0ee44 100644 --- a/drivers/common/cnxk/roc_cpt.c +++ b/drivers/common/cnxk/roc_cpt.c @@ -998,7 +998,7 @@ roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, } int -roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa, uint8_t opcode, +roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, uint8_t opcode, uint16_t ctx_len, uint8_t egrp) { union cpt_res_s res, *hw_res; @@ -1019,9 +1019,9 @@ roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa, uint8_t opcode, inst.w4.s.param1 = 0; inst.w4.s.param2 = 0; inst.w4.s.dlen = ctx_len; - inst.dptr = rte_mempool_virt2iova(sa); + inst.dptr = sa; inst.rptr = 0; - inst.w7.s.cptr = rte_mempool_virt2iova(sa); + inst.w7.s.cptr = sa; inst.w7.s.egrp = egrp; inst.w0.u64 = 0; @@ -1029,7 +1029,7 @@ roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa, uint8_t opcode, inst.w3.u64 = 0; inst.res_addr = (uintptr_t)hw_res; - rte_io_wmb(); + plt_io_wmb(); do { /* Copy CPT command to LMTLINE */ diff --git a/drivers/common/cnxk/roc_cpt.h b/drivers/common/cnxk/roc_cpt.h index 4e3a078..6953f2b 100644 --- a/drivers/common/cnxk/roc_cpt.h +++ b/drivers/common/cnxk/roc_cpt.h @@ -173,7 +173,7 @@ void __roc_api roc_cpt_parse_hdr_dump(const struct cpt_parse_hdr_s *cpth); int __roc_api roc_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa_dptr, void *sa_cptr, uint16_t sa_len); -int __roc_api roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, void *sa, +int __roc_api roc_on_cpt_ctx_write(struct roc_cpt_lf *lf, uint64_t sa, uint8_t opcode, uint16_t ctx_len, uint8_t egrp); #endif /* _ROC_CPT_H_ */ diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c index 6d26b0c..78c181b 100644 --- a/drivers/crypto/cnxk/cn9k_ipsec.c +++ b/drivers/crypto/cnxk/cn9k_ipsec.c @@ -82,8 +82,8 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp, ctx_len = ret; opcode = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_OUTBOUND; egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE]; - ret = roc_on_cpt_ctx_write(&qp->lf, (void *)&sa->out_sa, opcode, - ctx_len, egrp); + ret = roc_on_cpt_ctx_write(&qp->lf, rte_mempool_virt2iova(&sa->out_sa), + opcode, ctx_len, egrp); if (ret) return ret; @@ -174,8 +174,8 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp, ctx_len = ret; opcode = ROC_IE_ON_MAJOR_OP_WRITE_IPSEC_INBOUND; egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE]; - ret = roc_on_cpt_ctx_write(&qp->lf, (void *)&sa->in_sa, opcode, ctx_len, - egrp); + ret = roc_on_cpt_ctx_write(&qp->lf, rte_mempool_virt2iova(&sa->in_sa), + opcode, ctx_len, egrp); if (ret) return ret;