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Wed, 27 Jul 2022 05:24:10 -0700 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , , , Gal Shalom Subject: [PATCH] net/mlx5: fix detection of LRO support Date: Wed, 27 Jul 2022 15:24:06 +0300 Message-ID: <20220727122406.1609242-1-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6f240ab0-972c-4e1c-16b3-08da6fcaeacb X-MS-TrafficTypeDiagnostic: CH2PR12MB4279:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: F2HyRAVIkiJ9EBk7UCwqP3LkL9LrPo2tjwgfvD2GnilU3gYijVwIF7YbEqhE5Fenfd1OZ0NWXkBx3TUyDj1n3GUlVVeVkYASJ3sdAKd6aB0dha/zZl05Xq0h3ZsiZdOkMrVKMsh8lodajRLivjHBnb5U3mnGWt+Qfz+vJoHzh8Zzjj+h8VyjSlD30D2XUuSSYWg8VGzpAejEui7Kw3fMi9shW1foQxCFsYsmIBam/TO2db5fjr16VO8d7BkwRitvZ2y0lkeYm4FTuECkzCp+pp4dkai6GphhPoDeXc7C3GttgjTLjianuvJLsCSHU9C92SScrxvf6BgHx/M+GarilgrTwmeMW/D+PdvMsJG3cxsno4FVtH8qxc1DI7t29U2oWdwVO+D3n68Hc1If3mdGXAoDx0FCE2s1P1L+b3AFf3CzgilXUoH3/RYV2iVamQKuk0hGtozXuvSMRHIiHKjEALtcfyxd+4/pnhwrm6xebw1CaSZXAJZsUxiRGw8Dqz7ZuICec7MVlNfsrfaJT0F3fk2NdSTrJQIYa0L1B26JHaPjZ4vNOAvBZJI7XgwMsObxu/o59cxV/QxX/rDIHJnDoQOAuSZcv/NWxbvoGP9ziaDmG6dkMHcNuhoff9sASTef9f0S5Rop8WYmnJFWOBZI9sXZNGvLPFZEAlq1TwX1pGr735uoMs5+d4xE2muefijhEvKeLE+NnHqXd8mrlanpwg0TO2K0cQLmhQs0PX4THwiLxphqFCJVC7YtoRmX+N0c2yiOG27AYrv2VRQmUFpEQw+bkPOturibTiPnGtyiINp6nJjCRxDRWzp4vT7fz3/7S/o2eHFkUjFgJQgtrlVu4Q== X-Forefront-Antispam-Report: CIP:12.22.5.235; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230016)(4636009)(376002)(136003)(396003)(39860400002)(346002)(46966006)(40470700004)(36840700001)(186003)(5660300002)(336012)(40460700003)(6916009)(316002)(2616005)(82740400003)(426003)(36860700001)(2906002)(6286002)(107886003)(83380400001)(81166007)(1076003)(55016003)(450100002)(40480700001)(8936002)(54906003)(8676002)(82310400005)(70586007)(356005)(70206006)(6666004)(7696005)(41300700001)(36756003)(47076005)(478600001)(4326008)(26005)(86362001)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jul 2022 12:24:13.7726 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f240ab0-972c-4e1c-16b3-08da6fcaeacb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.235]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4279 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org One of the conditions to allow LRO offload is the DV configuration. The function incorrectly checks the DV configuration before initializing it by the user devarg; hence, LRO cannot be allowed. This patch moves this check to mlx5_shared_dev_ctx_args_config, where DV configuration is initialized. Fixes: c4b862013598 ("net/mlx5: refactor to detect operation by DevX") Cc: michaelba@nvidia.com Cc: stable@dpdk.org Signed-off-by: Michael Baum Reported-by: Gal Shalom Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 9 --------- drivers/net/mlx5/mlx5.c | 14 ++++++++++---- drivers/net/mlx5/mlx5.h | 2 +- drivers/net/mlx5/mlx5_devx.c | 2 +- drivers/net/mlx5/mlx5_rxq.c | 6 +++--- 5 files changed, 15 insertions(+), 18 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 0741028dab..1bba89d3c0 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -369,15 +369,6 @@ mlx5_os_capabilities_prepare(struct mlx5_dev_ctx_shared *sh) "DevX does not provide UAR offset, can't create queues for packet pacing."); sh->dev_cap.txpp_en = 0; #endif - /* Check for LRO support. */ - if (mlx5_devx_obj_ops_en(sh) && hca_attr->lro_cap) { - /* TBD check tunnel lro caps. */ - sh->dev_cap.lro_supported = 1; - DRV_LOG(DEBUG, "Device supports LRO."); - DRV_LOG(DEBUG, - "LRO minimal size of TCP segment required for coalescing is %d bytes.", - hca_attr->lro_min_mss_size); - } sh->dev_cap.scatter_fcs_w_decap_disable = hca_attr->scatter_fcs_w_decap_disable; sh->dev_cap.rq_delay_drop_en = hca_attr->rq_delay_drop; diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 998846adbe..5829b66b0b 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -1327,6 +1327,15 @@ mlx5_shared_dev_ctx_args_config(struct mlx5_dev_ctx_shared *sh, DRV_LOG(WARNING, "\"tx_skew\" doesn't affect without \"tx_pp\"."); } + /* Check for LRO support. */ + if (mlx5_devx_obj_ops_en(sh) && sh->cdev->config.hca_attr.lro_cap) { + /* TBD check tunnel lro caps. */ + config->lro_allowed = 1; + DRV_LOG(DEBUG, "LRO is allowed."); + DRV_LOG(DEBUG, + "LRO minimal size of TCP segment required for coalescing is %d bytes.", + sh->cdev->config.hca_attr.lro_min_mss_size); + } /* * If HW has bug working with tunnel packet decapsulation and scatter * FCS, and decapsulation is needed, clear the hw_fcs_strip bit. @@ -2392,10 +2401,7 @@ mlx5_port_args_config(struct mlx5_priv *priv, struct mlx5_kvargs_ctrl *mkvlist, config->mps == MLX5_MPW_ENHANCED ? "enhanced " : config->mps == MLX5_MPW ? "legacy " : "", config->mps != MLX5_MPW_DISABLED ? "enabled" : "disabled"); - /* LRO is supported only when DV flow enabled. */ - if (dev_cap->lro_supported && !priv->sh->config.dv_flow_en) - dev_cap->lro_supported = 0; - if (dev_cap->lro_supported) { + if (priv->sh->config.lro_allowed) { /* * If LRO timeout is not configured by application, * use the minimal supported value. diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index 8af84aef50..a56ee83d99 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -151,7 +151,6 @@ struct mlx5_dev_cap { /* HW has bug working with tunnel packet decap and scatter FCS. */ uint32_t hw_fcs_strip:1; /* FCS stripping is supported. */ uint32_t rt_timestamp:1; /* Realtime timestamp format. */ - uint32_t lro_supported:1; /* Whether LRO is supported. */ uint32_t rq_delay_drop_en:1; /* Enable RxQ delay drop. */ uint32_t tunnel_en:3; /* Whether tunnel stateless offloads are supported. */ @@ -308,6 +307,7 @@ struct mlx5_sh_config { uint32_t decap_en:1; /* Whether decap will be used or not. */ uint32_t hw_fcs_strip:1; /* FCS stripping is supported. */ uint32_t allow_duplicate_pattern:1; + uint32_t lro_allowed:1; /* Whether LRO is allowed. */ /* Allow/Prevent the duplicate rules pattern. */ }; diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 6886ae1f22..943aa8ef57 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -835,7 +835,7 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key, if (dev->data->dev_conf.lpbk_mode) tir_attr->self_lb_block = MLX5_TIRC_SELF_LB_BLOCK_BLOCK_UNICAST; if (lro) { - MLX5_ASSERT(priv->sh->dev_cap.lro_supported); + MLX5_ASSERT(priv->sh->config.lro_allowed); tir_attr->lro_timeout_period_usecs = priv->config.lro_timeout; tir_attr->lro_max_msg_sz = priv->max_lro_msg_size; tir_attr->lro_enable_mask = diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index eaf23d0df4..b1543b480e 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -374,7 +374,7 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev) RTE_ETH_RX_OFFLOAD_TCP_CKSUM); if (priv->sh->dev_cap.hw_vlan_strip) offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP; - if (priv->sh->dev_cap.lro_supported) + if (priv->sh->config.lro_allowed) offloads |= RTE_ETH_RX_OFFLOAD_TCP_LRO; return offloads; } @@ -843,9 +843,9 @@ mlx5_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, bool is_extmem = false; if ((offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) && - !priv->sh->dev_cap.lro_supported) { + !priv->sh->config.lro_allowed) { DRV_LOG(ERR, - "Port %u queue %u LRO is configured but not supported.", + "Port %u queue %u LRO is configured but not allowed.", dev->data->port_id, idx); rte_errno = EINVAL; return -rte_errno;