[v4,2/2] lpm: add a scalar version of lookupx4 function
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Commit Message
From: Michal Mazurek <maz@semihalf.com>
Add an implementation of the rte_lpm_lookupx4() function for platforms
without support for vector operations.
This will be useful in the upcoming RISC-V port as well as any platform
which may want to start with a basic level of LPM support.
Signed-off-by: Michal Mazurek <maz@semihalf.com>
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
---
doc/guides/rel_notes/release_22_07.rst | 5 ++++
lib/lpm/meson.build | 1 +
lib/lpm/rte_lpm.h | 4 ++-
lib/lpm/rte_lpm_scalar.h | 37 ++++++++++++++++++++++++++
4 files changed, 46 insertions(+), 1 deletion(-)
create mode 100644 lib/lpm/rte_lpm_scalar.h
Comments
On 01/06/2022 12:15, Stanislaw Kardach wrote:
> From: Michal Mazurek <maz@semihalf.com>
>
> Add an implementation of the rte_lpm_lookupx4() function for platforms
> without support for vector operations.
>
> This will be useful in the upcoming RISC-V port as well as any platform
> which may want to start with a basic level of LPM support.
>
> Signed-off-by: Michal Mazurek <maz@semihalf.com>
> Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
01/06/2022 13:52, Medvedkin, Vladimir:
> On 01/06/2022 12:15, Stanislaw Kardach wrote:
> > From: Michal Mazurek <maz@semihalf.com>
> >
> > Add an implementation of the rte_lpm_lookupx4() function for platforms
> > without support for vector operations.
> >
> > This will be useful in the upcoming RISC-V port as well as any platform
> > which may want to start with a basic level of LPM support.
> >
> > Signed-off-by: Michal Mazurek <maz@semihalf.com>
> > Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
>
> Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
Series applied, thanks.
@@ -104,6 +104,11 @@ New Features
* ``RTE_EVENT_QUEUE_ATTR_WEIGHT``
* ``RTE_EVENT_QUEUE_ATTR_AFFINITY``
+* **Added scalar version of the LPM library.**
+
+ * Added scalar implementation of ``rte_lpm_lookupx4``. This is a fall-back
+ implementation for platforms that don't support vector operations.
+
Removed Items
-------------
@@ -14,6 +14,7 @@ headers = files('rte_lpm.h', 'rte_lpm6.h')
indirect_headers += files(
'rte_lpm_altivec.h',
'rte_lpm_neon.h',
+ 'rte_lpm_scalar.h',
'rte_lpm_sse.h',
'rte_lpm_sve.h',
)
@@ -405,8 +405,10 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
#endif
#elif defined(RTE_ARCH_PPC_64)
#include "rte_lpm_altivec.h"
-#else
+#elif defined(RTE_ARCH_X86)
#include "rte_lpm_sse.h"
+#else
+#include "rte_lpm_scalar.h"
#endif
#ifdef __cplusplus
new file mode 100644
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 StarFive
+ * Copyright(c) 2022 SiFive
+ * Copyright(c) 2022 Semihalf
+ */
+
+#ifndef _RTE_LPM_SCALAR_H_
+#define _RTE_LPM_SCALAR_H_
+
+#include <rte_vect.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void
+rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
+ uint32_t defv)
+{
+ uint32_t nh;
+ int ret;
+
+ ret = rte_lpm_lookup(lpm, ((rte_xmm_t)ip).u32[0], &nh);
+ hop[0] = (ret == 0) ? nh : defv;
+ ret = rte_lpm_lookup(lpm, ((rte_xmm_t)ip).u32[1], &nh);
+ hop[1] = (ret == 0) ? nh : defv;
+ ret = rte_lpm_lookup(lpm, ((rte_xmm_t)ip).u32[2], &nh);
+ hop[2] = (ret == 0) ? nh : defv;
+ ret = rte_lpm_lookup(lpm, ((rte_xmm_t)ip).u32[3], &nh);
+ hop[3] = (ret == 0) ? nh : defv;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_LPM_SCALAR_H_ */