[v2,1/1] common/cnxk: added new macros to platform layer

  Added new platform layer macros for pointer operations,
bitwise operations, spinlocks and 32 bit read and write.

Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>
---
 drivers/common/cnxk/roc_platform.h | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)
  

On Mon, May 16, 2022 at 10:57 PM Srikanth Yalavarthi
<syalavarthi@marvell.com> wrote:
>
> Added new platform layer macros for pointer operations,
> bitwise operations, spinlocks and 32 bit read and write.
>
> Signed-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>

Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks

> ---
>  drivers/common/cnxk/roc_platform.h | 26 ++++++++++++++++++++++----
>  1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
> index 86987aea3b..1ad3c16705 100644
> --- a/drivers/common/cnxk/roc_platform.h
> +++ b/drivers/common/cnxk/roc_platform.h
> @@ -41,6 +41,7 @@
>  #define PLT_MEMZONE_NAMESIZE    RTE_MEMZONE_NAMESIZE
>  #define PLT_STD_C11             RTE_STD_C11
>  #define PLT_PTR_ADD             RTE_PTR_ADD
> +#define PLT_PTR_SUB             RTE_PTR_SUB
>  #define PLT_PTR_DIFF            RTE_PTR_DIFF
>  #define PLT_MAX_RXTX_INTR_VEC_ID RTE_MAX_RXTX_INTR_VEC_ID
>  #define PLT_INTR_VEC_RXTX_OFFSET RTE_INTR_VEC_RXTX_OFFSET
> @@ -70,6 +71,10 @@
>  #define PLT_U32_CAST(val) ((uint32_t)(val))
>  #define PLT_U16_CAST(val) ((uint16_t)(val))
>
> +/* Add / Sub pointer with scalar and cast to uint64_t */
> +#define PLT_PTR_ADD_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_ADD(__ptr, __x))
> +#define PLT_PTR_SUB_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_SUB(__ptr, __x))
> +
>  /** Divide ceil */
>  #define PLT_DIV_CEIL(x, y)                     \
>         ({                                      \
> @@ -113,10 +118,11 @@
>  #define plt_bitmap_scan                        rte_bitmap_scan
>  #define plt_bitmap_get_memory_footprint rte_bitmap_get_memory_footprint
>
> -#define plt_spinlock_t     rte_spinlock_t
> -#define plt_spinlock_init   rte_spinlock_init
> -#define plt_spinlock_lock   rte_spinlock_lock
> -#define plt_spinlock_unlock rte_spinlock_unlock
> +#define plt_spinlock_t      rte_spinlock_t
> +#define plt_spinlock_init    rte_spinlock_init
> +#define plt_spinlock_lock    rte_spinlock_lock
> +#define plt_spinlock_unlock  rte_spinlock_unlock
> +#define plt_spinlock_trylock rte_spinlock_trylock
>
>  #define plt_intr_callback_register   rte_intr_callback_register
>  #define plt_intr_callback_unregister rte_intr_callback_unregister
> @@ -165,12 +171,24 @@
>  #define plt_write64(val, addr)                                                 \
>         rte_write64_relaxed((val), (volatile void *)(addr))
>
> +#define plt_read32(addr) rte_read32_relaxed((volatile void *)(addr))
> +#define plt_write32(val, addr)                                                 \
> +       rte_write32_relaxed((val), (volatile void *)(addr))
> +
>  #define plt_wmb()              rte_wmb()
>  #define plt_rmb()              rte_rmb()
>  #define plt_io_wmb()           rte_io_wmb()
>  #define plt_io_rmb()           rte_io_rmb()
>  #define plt_atomic_thread_fence rte_atomic_thread_fence
>
> +#define plt_bit_relaxed_get32   rte_bit_relaxed_get32
> +#define plt_bit_relaxed_set32   rte_bit_relaxed_set32
> +#define plt_bit_relaxed_clear32 rte_bit_relaxed_clear32
> +
> +#define plt_bit_relaxed_get64   rte_bit_relaxed_get64
> +#define plt_bit_relaxed_set64   rte_bit_relaxed_set64
> +#define plt_bit_relaxed_clear64 rte_bit_relaxed_clear64
> +
>  #define plt_mmap       mmap
>  #define PLT_PROT_READ  PROT_READ
>  #define PLT_PROT_WRITE PROT_WRITE
> --
> 2.17.1
>